Time ratio control and inverter power circuits

Claim 1

AN IMPROVED POWER CIRCUIT USING TURN ON, NON-GATE TURN OFF SOLID STATE SEMICONDUCTING DEVICES INCLUDING IN COMBINATION A LOAD CURRENT CARRYING GATE TURN ON, NONGATE TURN OFF TRIAC CONTROLLED CONDUCTING DEVICE, A FILTER INDUCTANCE, AND A LOAD OPERATIVELY CONNECTED IN SERIES CIRCUIT RELATIONSHIP ACROSS A PAIR OF POWER SUPPLY TERMINALS THAT IN TURN ARE ADAPTED TO BE CONNECTED ACROSS A SOURCE OF ELECTRIC POTENTIAL, FIRST GATING CIRCUIT MEANS OPERATIVELY CONNECTED TO THE CONTROL GATE OF THE LOAD CURRENT CARRYING TRIAC DEVICE FOR TURNING ON THE DEVICE TO CAUSE IT TO CONDUCT CURRENT IN EITHER ONE OF THE DIRECTIONS DEPENDING UPON THE POLARITY OF THE POTENTIAL APPLIED ACROSS THE DEVICE, FIRST COMMUTATION CIRCUIT MEANS COMPRISING A FIRST SATURABLE REACTOR AND A FIRST COMMUNICATING CAPACITOR CONNECTED IN SERIES CIRCUIT RELATIONSHIP ACROSS THE LOAD CURRENT CARRYING TRIAC DEVICE TUNED TO SERIES RESONANCE AT A DESIRED COMMUTATING FREQUENCY, FIRST BLOCKING CIRCUIT MEANS INTERCONNECTING THE FIRST GATING CIRCUIT MEANS AND THE FIRST COMMUTATION CIRCUIT MEANS FOR RENDERING SAID FIRST GATING CIRCUIT MEANS INEFFECTIVE DURING THE COMMUNICATION INTERVALS OF SAID FIRST COMMUTATION CIRCUIT MEANS, A COASTING GATE TURN ON, NON-GATE TURN OFF TRIAC CONTROLLED CONDUCTING DEVICE CONNECTED IN PARALLEL CIRCUIT RELATIONSHIP WITH THE FILTER INDUCTANCE AND THE LOAD, SECOND GATING CIRCUIT MEANS OPERATIVELY CONNECTED TO THE CONTROL GATE OF SAID COASTING TRIAC DEVICE FOR TURNING ON THE COASTING TRIAC DEVICE TO CAUSE IT TO CONDUCT CURRENT IN EITHER ONE OF TWO DIRECTIONS DEPENDING UPON THE POLARITY OF THE POTENTIALS ACROSS THE DEVICE, SECOND COMMUNICATION CIRCUIT MEANS COMPRISING A SECOND SATURABLE REACTOR AND A SECOND COMMUTATING CAPACITOR CONNECTED IN SERIES CIRCUIT RELATIONSHIP ACROSS THE COASTING TRIAC DEVICE AND TUNED TO SERIES RESONANCE AT THE DESIRED COMMUTATING FREQUENCY, AND SECOND BLOCKING CIRCUIT MEANS INTERCONNECTING THE SECOND COMMUTATION CIRCUIT MEANS AND THE SECOND GATING CIRCUIT MEANS FOR RENDERING THE SECOND GATING CIRCUIT MEANS INEFFECTIVE DURING THE COMMUTATION INTERVALS OF THE SECOND COMMUTATION CIRCUIT MEANS.