US3347703A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating an electrical memory module
Assignee: Unisys Corp
•
Filing: 1963-02-05
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Granted: 1967-10-17
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Expires: 1983-02-05
Abstract
No abstract record available.
Inventors
- 👤 Joseph H Engelman
- 👤 William A Witsell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 14:38
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/02; Y; Y10; Y10S; Y10S428/00; Y10S428/90; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/4902; Y10T29/49069; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49158; Y10T428/00; Y10T428/24; Y10T428/24479; Y10T428/2457
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
113 words
A METHOD OF FABRICATING AN ELECTRICAL MEMORY MODULE COMPRISING THE STEPS OF: (A) PROVIDING A DIELETRIC HIGH HEAT RESISTANT SUBSTRATE, (B)APPLYING CONDUCTIVE MATERIAL TO SAID SUBSTRATE IN A PREARRANGED PATTERN THEREBY TO FROM ELECTRICAL CONDUCTORS THEREON, (C) APPLYING AN INSULATING LAYER TO SAID CONDUCTIVE PATTERN, (D) FIRING SAID INSULATING LAYER TO A FIRE POLISHED GLASSLIKE PORE FREE SURFACE, (E) DEPOSITING A THIN MAGNETIC FILM OF MATERIAL OVER SAID FIRE POLISHED SURFACE, (F)APPLYING AN INSULATING LAYER OVER SAID THIN FILM, AND (G) APPLYING CONDUCTIVE MATERIAL TO SAID LAST NAMED INSULATING LAYER IN A PREARRANGED PATTERN FORMING ELECTRICAL CONDUCTORS INTERCONNECTING WITH SAID FIRST ELECTRICAL CONDUCTORS THEREBY COMPLETING AN ELECTRICALLY CONDUCTING PATHWAY ENCIRCLING SAID THIN FILM.
Claim 2
Independent Claim
113 words
A METHOD OF FABRICATING AN ELECTRICAL MEMORY MODULE COMPRISING THE STEPS OF: (A) PROVIDING A DIELETRIC HIGH HEAT RESISTANT SUBSTRATE, (B)APPLYING CONDUCTIVE MATERIAL TO SAID SUBSTRATE IN A PREARRANGED PATTERN THEREBY TO FROM ELECTRICAL CONDUCTORS THEREON, (C) APPLYING AN INSULATING LAYER TO SAID CONDUCTIVE PATTERN, (D) FIRING SAID INSULATING LAYER TO A FIRE POLISHED GLASSLIKE PORE FREE SURFACE, (E) DEPOSITING A THIN MAGNETIC FILM OF MATERIAL OVER SAID FIRE POLISHED SURFACE, (F)APPLYING AN INSULATING LAYER OVER SAID THIN FILM, AND (G) APPLYING CONDUCTIVE MATERIAL TO SAID LAST NAMED INSULATING LAYER IN A PREARRANGED PATTERN FORMING ELECTRICAL CONDUCTORS INTERCONNECTING WITH SAID FIRST ELECTRICAL CONDUCTORS THEREBY COMPLETING AN ELECTRICALLY CONDUCTING PATHWAY ENCIRCLING SAID THIN FILM.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1970-10-16 | 1971-04-17 | 1971-10-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1974-10-16 | 1975-04-17 | 1975-10-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1978-10-16 | 1979-04-17 | 1979-10-17 | $7700.00 | Window Closed / Lapsed |