US3346802A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Control and regulation device including a semiconductor of symmetrical blocking-unblocking type
Assignee: Alcatel Lucent SAS
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Filing: 1964-08-05
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Granted: 1967-10-10
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Expires: 1984-08-05
Abstract
No abstract record available.
Inventors
- 👤 Biet Jean Pierre
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:22
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/72; H03K17/722; H03K17/723; G; G05; G05D; G05D23/00; G05D23/19; G05D23/1906; G05D23/20; G05D23/22; G05D23/2236; G05D23/224; G05F; G05F1/00; G05F1/10; G05F1/12; G05F1/40; G05F1/44; Y; Y10; Y10S; Y10S315/00; Y10S315/04
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
142 words
CONTROL AND REGULATION CIRCUIT INCLUDING A SYMMETRICALLY CONDUCTING, GATE CONTROLLED TURN-ON AND TURN-OFF SEMICONDUCTOR DEVICE OF THE TRIGGERED AVALANCHE CONDUCTING TYPE HAVING A SINGLE CONTROL ELECTRODE, THE SINGLE CONTROL ELECTRODE BEING CONNECTED TO ONE OF THE OUTPUT TERMINALS OF A SIGNAL GENERATING DEVICE THROUGH A RESISTANC, THE SECOND OUTPUT TERMINAL OF THE SIGNAL GENERATING DEVICE BEING CONNECTED TO THE TWO MAIN ELECTRODES OF SAID SEMICONDUCTOR DEVICE RESPECTIVELY THROUGH TWO RECTIFIERS THE PASSING DIRECTION OF WHICH ARE DIRECTED TO THE MAIN ELECTRODES, SAID SIGNAL GENERATING DEVICE INCLUDING A TRANSFORMER THE CORE OF WHICH IS MADE OF A QUASI-RECTANGULAR HYSTERESIS CURVE MATERIAL, THE SIGNAL GENERATING DEVICE BEING SYNCHRONIZED WITH THE ALTERNATING CURRENT SOURCE SUPPLYING THE CIRCUIT WHICH INCLUDES THE SEMICONDUCTOR DEVICE, AND BEING CONTROLLED BY MEANS OF A REGULATION DEVICE RESPONSIVE TO THE PARAMETERS DRFINING THE WORK OF THE LOAD INSERTED IN SAID CIRCUIT.
Claim 2
Dependent Claim
142 words
CONTROL AND REGULATION CIRCUIT INCLUDING A SYMMETRICALLY CONDUCTING, GATE CONTROLLED TURN-ON AND TURN-OFF SEMICONDUCTOR DEVICE OF THE TRIGGERED AVALANCHE CONDUCTING TYPE HAVING A SINGLE CONTROL ELECTRODE, THE SINGLE CONTROL ELECTRODE BEING CONNECTED TO ONE OF THE OUTPUT TERMINALS OF A SIGNAL GENERATING DEVICE THROUGH A RESISTANC, THE SECOND OUTPUT TERMINAL OF THE SIGNAL GENERATING DEVICE BEING CONNECTED TO THE TWO MAIN ELECTRODES OF SAID SEMICONDUCTOR DEVICE RESPECTIVELY THROUGH TWO RECTIFIERS THE PASSING DIRECTION OF WHICH ARE DIRECTED TO THE MAIN ELECTRODES, SAID SIGNAL GENERATING DEVICE INCLUDING A TRANSFORMER THE CORE OF WHICH IS MADE OF A QUASI-RECTANGULAR HYSTERESIS CURVE MATERIAL, THE SIGNAL GENERATING DEVICE BEING SYNCHRONIZED WITH THE ALTERNATING CURRENT SOURCE SUPPLYING THE CIRCUIT WHICH INCLUDES THE SEMICONDUCTOR DEVICE, AND BEING CONTROLLED BY MEANS OF A REGULATION DEVICE RESPONSIVE TO THE PARAMETERS DRFINING THE WORK OF THE LOAD INSERTED IN SAID CIRCUIT.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1970-10-09 | 1971-04-10 | 1971-10-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1974-10-09 | 1975-04-10 | 1975-10-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1978-10-09 | 1979-04-10 | 1979-10-10 | $7700.00 | Window Closed / Lapsed |