← Back to Patent Explorer
US3346744A Expired / Lapsed US ⏱️ 0.0 years remaining

Power control circuits

Assignee: General Electric Co
•
Filing: 1967-03-08
•
Granted: 1967-10-10
•
Expires: 1987-03-08
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Howell Edward Keith

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 11:17
CPC Classifications
H; H05; H05B; H05B39/00; H05B39/04; H05B39/08; G; G05; G05D; G05D23/00; G05D23/19; G05D23/1906; G05D23/20; G05D23/24; G05F; G05F1/00; G05F1/10; G05F1/12; G05F1/40; G05F1/44; G05F1/45; G05F1/455; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/72; H03K17/722; H03K17/723; H03K17/725; H10; H10D; H10D18/00; H10D18/80; Y; Y10; Y10S; Y10S315/00; Y10S315/04

Claims Analysis

Total Claims: 1
Claim 1
Independent Claim 235 words
IN COMBINATION, A BILATERAL CONTROLLABLE SEMICONDUCTOR SWITCHING DEVICE FOR CONTROLLING THE CURRENT APPLIED TO A LOAD FROM A SOURCE OF ALTERNATING POTENTIAL UNDER CONTROL OF SWITCHING SIGNALS COMPRISING A BODY OF SEMICONDUCTOR MATERIAL INCLUDING FIVE LAYERS OF ONE AND THE OPPOSITE CONDUCTIVITY TYPES, LAYERS OF ONE CONDUCTIVITY TYPE BEING INTERLEAVED WITH LAYERS OF THE OPPOSITE CONDUCTIVITY TYPE FOMRING A PLUARLITY OF P-N JUNCTIONS THEREIN, A FIRST MAIN CURRENT CARRYING ELECTRODE IN LOW RESISTANCE OHMIC CONTACT WITH A SURFACE OF AN EXTERNAL LAYER OF SAID BODY AND AN EXPOSED SURFACE OF AN ADJACENT INTERMEDIATE LAYER, A SECOND MAIN CURRENT CARRYING ELECTRODE IN LOW RESISTANCE OHMIC CONTACT WITH A SURFACE OF THE OTHER EXTERNAL LAYER OF SAID BODY AND AN EXPOSED SURFACE OF AN ADJACENT INTERMEDIATE LAYER, MEANS FOR COUPLING SAID DEVICE IN SERIES BETWEEN SAID FIRST AND SAID SECOND MAIN CURRENT CARRYING ELECTRODES WITH SAID LOAD AND SAID ALTERNATING POTENTIAL, A GATE REGION OF THE SAME CONDUCTIVITY TYPE AS SAID EXTERNAL LAYERS OF SAID BODY ADJACENT SAID INTERMEDIATE LAYER CONTACTED BY SAID FIRST MAIN CURRENT CARRYING ELECTRODE, GATING ELECTRODE MEANS IN OHMIC CONTACT WITH SAID GATE REGION AND WITH THE ADJACENT INTERMEDIATE LAYER, MEANS FOR SWITCHING SAID SEMICONDUCTOR DEVICE BETWEEN HIGH AND LOW IMPEDANCE STATES FOR CURRENT THROUGH SAID DEVICE IN OPPOSITE SENSES COMPRISING MEANS FOR COUPLING SUCH SWITCHING SIGNALS BETWEEN SAID GATE ELECTRODE MEANS AND ONE OF SAID FIRST AND SECOND MAIN CURRENT CARRYING ELECTRODES.

References Cited (Backward Citations)

US1635779A Cited
US2220118A Cited
US2774888A Cited
FR1267417A Cited
US3196330A Cited
US3221183A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1970-10-09 1971-04-10 1971-10-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1974-10-09 1975-04-10 1975-10-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1978-10-09 1979-04-10 1979-10-10 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag