← Back to Patent Explorer
US3341381A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making a semiconductor by selective impurity diffusion

Assignee: Texas Instruments Inc
•
Filing: 1966-10-24
•
Granted: 1967-09-12
•
Expires: 1986-10-24
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Henry P Bergman
  • 👤 Jr Roy W Stiegler

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 06:03
CPC Classifications
C; C23; C23C; C23C8/00; H; H10; H10D; H10D99/00; C23C16/00; C23C16/22; C23C16/30; C23C16/40; C23C16/401; C23C16/402; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10P14/6923; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/17; H10P32/171; Y; Y10; Y10S; Y10S148/00; Y10S148/015; Y10S148/037; Y10S148/043; Y10S148/062; Y10S148/079; Y10S148/118; Y10S148/144; Y10S148/151; Y10S148/173

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 106 words
A METHOD OF MAKING A PLANAR TRANSISTOR HAVING GALLIUM AS THE IMPURITY IN THE BASE REGION COMPRISING THE STEPS OF PROVIDING A WAFER OF N-TYPE SEMICONDUCTOR MATERIAL, DEPOSITING AT LOW TEMPERATURE ON ONE FACE OF THE WAFER A COATING OF SILICON OXIDE CONTAINING GALLIUM, RE MOVING SAID OXIDE COATING FROM SAID ONE FACE EXCEPT IN A CENTRALLY-LOCATED PORTION SUBJECTING SAID WAFER TO A HIGH TEMPERATURE TO DIFFUSE GALLIUM FROM SAID PORTION INTO A WAFER A BASE REGION IS PRODUCED, AND THEREAFTER REMOVING A SMALL CENTRALLY-LOCATED SEGMENT OF SAID PORTION OF GALLIUM-DOPED OXIDE AND DIFFUSING A DONOR IMPURITY INTO SAID BASE REGION TO FORM AN EMITTER REGION.
Claim 2
Independent Claim 106 words
A METHOD OF MAKING A PLANAR TRANSISTOR HAVING GALLIUM AS THE IMPURITY IN THE BASE REGION COMPRISING THE STEPS OF PROVIDING A WAFER OF N-TYPE SEMICONDUCTOR MATERIAL, DEPOSITING AT LOW TEMPERATURE ON ONE FACE OF THE WAFER A COATING OF SILICON OXIDE CONTAINING GALLIUM, RE MOVING SAID OXIDE COATING FROM SAID ONE FACE EXCEPT IN A CENTRALLY-LOCATED PORTION SUBJECTING SAID WAFER TO A HIGH TEMPERATURE TO DIFFUSE GALLIUM FROM SAID PORTION INTO A WAFER A BASE REGION IS PRODUCED, AND THEREAFTER REMOVING A SMALL CENTRALLY-LOCATED SEGMENT OF SAID PORTION OF GALLIUM-DOPED OXIDE AND DIFFUSING A DONOR IMPURITY INTO SAID BASE REGION TO FORM AN EMITTER REGION.

References Cited (Backward Citations)

US3200019A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1970-09-11 1971-03-13 1971-09-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1974-09-11 1975-03-13 1975-09-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1978-09-11 1979-03-13 1979-09-12 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag