Frequency multiplier structure wherein a distributed parameter circuit is combined with a lumped parameter circuit

Claim 1

A FREQUENCY MULTIPLIER SYSTEM FOR RECEIVING AN ALTERNATING CURRENT OF A FUNDAMENTAL FREQUENCY AND MULTIPLYING THE SAME AN INTEGRAL NUMBER OF TIMES TO FORM AN OUTPUT FREQUENCY SAID SYSTEM INCLUDING IN COMBINATION, A VARACTOR DIODE, A STRUCTURE INCLUDING A COAXIAL LINE, FIRST AND SECOND CAPACITORS, AND WAVEGUIDE MEANS, SAID VARACTOR DIODE BEING POSITIONED IN SAID WAVEGUIDE MEANS AND COUPLED THERETO AND BEING CONNECTED TO SAID COAXIAL LINE, AN INPUT CIRCUIT FOR COUPLING SAID COAXIAL LINE TO MEANS PROVIDING THE ALTERNATING CURRENT OF FUNDAMENTAL FREQUENCY, SAID INPUT CIRCUIT INCLUDING A LOW PASS FILTER PORTION TUNED TO ATTENUATE HARMONICS OF THE FUNDAMENTAL FREQUENCY GREATER THAN THE FIRST HARMONIC, AND A FIRST BAND PASS FILTER PORTION TUNED TO A LOW ORDER IDLER HARMONIC FREQUENCY OF THE FUNDAMENTAL FREQUENCY AND CONNECTED TO SAID COAXIAL LINE, SAID COAXIAL LINE HAVING INNER AND OUTER CONDUCTORS, SHORTING MEANS CONNECTING SAID CONDUCTORS AND ADAPTED TO BE POSITIONED ALONG SAID LINE WHEREBY SAID LINE IS TUNED, SAID FIRST CAPACITOR BEING COUPLED TO SAID COAXIAL LINE AND COOPERATING THEREWITH TO PROVIDE A SECOND BAND PASS FILTER TUNED TO A HIGH ORDER IDLER HARMONIC FREQUENCY OF THE FUNDAMENTAL FREQUENCY, SAID WAVEGUIDE MEANS COUPLING SAID VARACTOR DIODE TO A LOAD AND INCLUDING AN OUTPUT FILTER TUNED TO ATTENUATE HARMONICS OTHER THAN THE DESIRED OUTPUT HARMONIC, SAID SECOND CAPACITOR BEING COUPLED BETWEEN SAID VARACTOR DIODE AND A REFERENCE POTENTIAL TO PROVIDE A RETURN PATH FOR THE OUTPUT FREQUENCY SIGNAL, SAID INPUT CIRCUIT AND SAID STRUCTURE COOPERATING TO PROVIDE LOW IMPEDANCE PATHS FOR EACH OF THE FUNDAMENTAL LOW ORDER IDLER, HIGH ORDER IDLER AND OUTPUT HARMONIC CURRENTS TO CIRCULATE THROUGH SAID VARACTOR DIODE.