Circuit for suppressing scanner-signal deficiencies in systems for identification ofcharacters

Claim 1

A CIRCUIT FOR SUPPRESSING CHARACTER-IRREGULARITY DEFECTS IN SIGNALS PRODUCED BY COLUMNAR SCANNING OF CHARACTERS TO BE IDENTIFIED, COMPRESSING A SIGNAL INPUT LEAD, AN AND GATE AND A NOR GATE AND A BISTABLE FLIP-FLOP STAGE HAVING RESPECTIVE INPUTS CONNECTED TO SAID SIGNAL INPUT LEAD, SAID TWO GATES HAVING RESPECTIVE SECOND INPUTS CONNECTED TO THE OUTPUT OF SAID FLIP-FLOP STAGE, AN INHIBIT GATEHAVING A LOCK-OUT INPUT CONNECTED WITH THE OUTPUT OF SAID NOR GATE AND HAVING ANOTHER INPUT, AN OR GATE HAVING AN INPUT CONNECTED TO THE OUTPUT OF SAID AND GATE AND HAVING AN OUTPUT CONNECTED WITH SAID OTHER INPUT OF SAID INHIBIT GATE, A SHIFT REGISTER CONNECTED TO THE OUTPUT OF SAID INHIBIT GATE AND HAVING A BIT STORAGE CAPACITY SUFFCIENT FOR SIMULTANEOUS STORAGE OF THE SCANNER SIGNALS RECEIVABLE BY SAID SIGNAL INPUT LEAD DURING A SCAN COLUMN, SAID REGISTER HAVING AN OUTPUT CONNECTED WITH ANOTHER INPUT OF SAID OR GATE, AND A SIGNAL OUTPUT LEAD CONNECTED TO A CIRCUIT POINT SUBSEQUENT TO SAID INHIBIT GATE, WHEREBY CHARACTER-IRREGULARITY DEFECTS OF SIGNALS RECEIVED AT SAID INPUT LINE ARE REDUCED IN THE SIGNALS ISSUING AT SAID OUTPUT LINE.