Patent US3281718A successfully refreshed from Google Patents.
US3281718A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Field effect transistor amplitude modulator
Assignee: Motorola Solutions Inc
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Filing: 1964-01-07
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Granted: 1966-10-25
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Expires: 1984-01-07
Abstract
No abstract record available.
Inventors
- 👤 Lloyd E Weberg
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:12
CPC Classifications
H; H03; H03C; H03C1/00; H03C1/36
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
146 words
A MODULATOR CIRCUIT INCLUDING IN COMBINATION: INPUT TERMINAL MEANS; OUTPUT CIRCUIT MEANS INCLUDING A TRANSFORMER HAVING A PRIMARY WINDING AND A SECONDARY WINDING; FIRST RESISTANCE MEANS AND FIRST CAPACITANCE MEANS HAVING A FIRST COMMON JUNCTION AND BEING SERIES-CONNECTED BETWEEN SAID INPUT TERMINAL MEANS AND ONE SIDE OF SAID PRIMARY WINDING; SECOND RESISTANCE MEANS AND SECOND CAPACITANCE MEANS HAVING A SECOND COMMON JUNCTION AND BEING SERIES-CONNECTED BETWEEN SAID INPUT TERMINAL MEANS AND THE OTHER SIDE OF SAID PRIMARY WINDING; A FIELD EFFECT TRANSISTOR INCLUDING A SOURCE ELECTRODE AND A DRAIN ELECTRODE RESPECTIVELY CONNECTED TO SAID FIRST AND SECOND COMMON JUNCTIONS; SAID FIELD EFFECT TRANSISTOR FURTHER INCLUDING A GATE ELECTRODE AND BEING RESPONSIVE TO AN ALTERNATINGCURRENT KEYING SIGNAL APPLIED TO SAID GATE ELECTRODE PERIODICALLY TO CAUSE SAID FIELD EFFECT TRANSISTOR TO BE NONCONDUCTIVE; AND CONTROL CIRCUIT MEANS COUPLED TO SAID GATE ELECTRODE FOR APPLYING SAID KEYING SIGNAL THERETO.
Claim 2
Dependent Claim
146 words
A MODULATOR CIRCUIT INCLUDING IN COMBINATION: INPUT TERMINAL MEANS; OUTPUT CIRCUIT MEANS INCLUDING A TRANSFORMER HAVING A PRIMARY WINDING AND A SECONDARY WINDING; FIRST RESISTANCE MEANS AND FIRST CAPACITANCE MEANS HAVING A FIRST COMMON JUNCTION AND BEING SERIES-CONNECTED BETWEEN SAID INPUT TERMINAL MEANS AND ONE SIDE OF SAID PRIMARY WINDING; SECOND RESISTANCE MEANS AND SECOND CAPACITANCE MEANS HAVING A SECOND COMMON JUNCTION AND BEING SERIES-CONNECTED BETWEEN SAID INPUT TERMINAL MEANS AND THE OTHER SIDE OF SAID PRIMARY WINDING; A FIELD EFFECT TRANSISTOR INCLUDING A SOURCE ELECTRODE AND A DRAIN ELECTRODE RESPECTIVELY CONNECTED TO SAID FIRST AND SECOND COMMON JUNCTIONS; SAID FIELD EFFECT TRANSISTOR FURTHER INCLUDING A GATE ELECTRODE AND BEING RESPONSIVE TO AN ALTERNATINGCURRENT KEYING SIGNAL APPLIED TO SAID GATE ELECTRODE PERIODICALLY TO CAUSE SAID FIELD EFFECT TRANSISTOR TO BE NONCONDUCTIVE; AND CONTROL CIRCUIT MEANS COUPLED TO SAID GATE ELECTRODE FOR APPLYING SAID KEYING SIGNAL THERETO.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1969-10-24 | 1970-04-25 | 1970-10-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1973-10-24 | 1974-04-25 | 1974-10-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1977-10-24 | 1978-04-25 | 1978-10-25 | $7700.00 | Window Closed / Lapsed |