Coded decimal adder

Claim 1

A COMPUTER, COMPRISING IN COMBINATION: AN ACCUMULATOR REGISTER; A CARRY REGISTER; AN AUXILIARY REGISTER; A PLURALITY OF POWER ELEMENT MEANS FOR SIMULTANEOUSLY APPLYING POWER SIGNALS TO AT LEAST SEVERAL ELEMENTS OF EACH REGISTER TO CARRY OUT PREDETERMINED STEPS; CONTROL NETWORK MEANS CONNECTING SAID POWER ELEMENT MEANS WITH SAID REGISTERS AND PROVIDING A PREDETERMINED CONNECTION FORMING A CIRCUIT MEANS THEREBETWEEN FOR EACH OF A PLURALITY OF SEQUENCE STAGES, EACH PREDETERMINED CONNECTION BEING IN A DIFFERENT PORTION OF SAID NETWORK MEANS; SEQUENCE SWITCHING CHAIN MEANS ADAPTED TO RECEIVE TIMING PULSES AND INDIVIDUALLY ACTUATING THE PREDETERMINED CONNECTIONS, SAID NETWORK MEANS BEING ARRANGED TO CAUSE ADDITION OF DECIMAL NUMBERS HAVING THEIR DIGITS BINARY CODED IN TETRADS TO FORM OPERANDS WHICH ARE SUMMANDS WHEN READY FOR AN ADDITION PROCESS WHETHER PREVIOUSLY PROCESSED OR NOT, THE CIRCUIT MEANS DEFINING SAID NETWORK MEANS INCLUDING: FIRST CIRCUIT MEANS FOR CONTROLLING SAID POWER ELEMENT MEANS TO SELECTIVELY INVERT THE CONTENT OF A REGISTER WHEN IT REPRESENTS A NEGATIVE BINARY NUMBER SO THAT IT REPRESENTS THE CORRESPONDING POSITIVE NUMBER; SECOND CIRCUIT MEANS FOR CONTROLLING SAID POWER ELEMENT MEANS TO ADD TWO BINARY NUMBERS IN TWO REGISTERS TO FORM A FIRST CYCLIC SUM EXCLUSIVE OF ALL CARRIES AND FOR ADDING THE CARRIES TO SAID SUM TO FORM AN UNCORRECTED ADDITION RESULT; AND THIRD CIRCUIT MEANS FOR CONTROLLING SAID POWER ELEMENT MEANS TO ADD SAID FIRST CYCLIC SUM AND SAID UNCORRECTED ADDITION RESULT TO FOR MAN AUXILIARY NUMBER IN ONE OF SAID REGISTERS WHICH INDICATES IN THE LOWEST DIGIT TO EACH OF ITS TETRADS WHETHER A TRANSFER FROM THE NEXT LOWER TETRAD HAS TAKEN PLACE DURING FORMATION OF THE UNCORRECTED ADDITION RESULT.