Field-effect transistor devices

Claim 1

A FIELD EFFECT TRANSISTOR COMPRISING A SEMICONDUCTOR BODY OF ONE CONDUCTIVITY TYPE HAVING FIRST AND SECOND PARALLEL PLANAR SIDES, AN ANNULAR RING OF OPPOSITE CONDUCTIVITY TYPE RECESSED WITHIN THE PLANE OF SAID FIRST SIDE, SOURCE AND DRAIN ELECTRODES MOUNTED ON SAID FIRST SIDE, CONCENTRICALLY DISPOSED ABOUT SAID RING, A GATE ELECTRODE MOUNTED ON SAID RING FOR PROVIDING SPACE CHARGE MODULATION WITHIN SAID SEMICONDUCTOR BODY, A REGION OF OPPOSITE CONDUCTIVITY TYPE FORMED ON SAID SECOND SIDE TO PROVIDE FOR SPACE CHARGE BIAS CONTROL, AND WHEREIN THE SPACING BETWEEN SAID DRAIN AND GATE ELECTRODES IS GREATER THAN HALF THE WIDTH OF THE SEMICONDUCTOR BODY BETWEEN THE AREAS OF OPPOSITE CONDUCTIVITY TYPE.