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US3273979A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductive devices

Assignee: RCA Corp
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Filing: 1964-07-06
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Granted: 1966-09-20
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Expires: 1984-07-06
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Abstract

Abstract 1,083,172. Semi-conductor devices. RADIO CORPORATION OF AMERICA. June 16, 1965 [July 6, 1964], No. 25554/65. Heading H1K. As shown, Fig. 4, a germanium layer 14 is applied to a silicon wafer 10 before it is soldered to a metallic body 15 by means of a goldgermanium solder preform 18 to improve the wetting of the surface of the wafer. In an embodiment, wafer 10 is of N-type silicon and may contain various regions and have electrodes applied to it, layer 12 is produced by the co-evaporation of germanium and antimony, metallic body 15 is of nickel, molybdenum, or iron-nickel-cobalt alloy and has a layer 16 of gold deposited on its surface by evaporation or plating, preform 18 is of 88 : 12 goldgermanium alloy, and the arrangement is heated in a non-oxidizing ambient such as a vacuum, nitrogen, argon, hydrogen, or forming gas. Preform 18 melts and dissolves part or all of germanium layer 14 and in the latter case part of silicon wafer 10 may also be dissolved. In another embodiment Fig. 6 (not shown), the germanium layer (14) contains an impurity such as boron, aluminium, gallium, indium, phosphorus, arsenic, or antimony and is covered with a layer (19) of gold produced by evaporation or plating.

Inventors

  • 👤 Alfred S Budnick

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 18:08
CPC Classifications
H; H10; H10P; H10P95/00; H10W; H10W72/00; H10W72/30; H10W72/071; H10W72/073; H10W72/07331; H10W72/07336; H10W72/351; H10W72/352; Y; Y10; Y10S; Y10S428/00; Y10S428/922; Y10S428/9335; Y10S428/934; Y10S428/938; Y10S428/939; Y10T; Y10T428/00; Y10T428/12; Y10T428/12493; Y10T428/12528; Y10T428/12674; Y10T428/12771; Y10T428/12861; Y10T428/12889

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 81 words
THE METHOD OF MAKING A SEMICONDUCTOR DEVICE ASSEMBLAGE, COMPRISING THE STEPS OF: PREPARING A SILICON DIE HAVING AT LEAST ONE MAJOR FACE, AND HAVING A LAYER OF GERMANIUM ON SAID ONE MAJOR FACE; POSITIONING A GOLD-GERMANIUM ALLOY PREFORM ON A METALLIC BODY; DISPOSING SAID DIE AND SAID PREFORM WITH SAID GERMANIUM LAYER IN CONTACT WITH SAID PREFORM; AND, HEATING THE ASSEMBLAGE OF SAID DIE, SAID PREFORM, AND SAID METALLIC BODY TO A TEMPERATURE SUFFICIENT TO BOND SAID DIE TO SAID BODY.
Claim 2
Independent Claim 81 words
THE METHOD OF MAKING A SEMICONDUCTOR DEVICE ASSEMBLAGE, COMPRISING THE STEPS OF: PREPARING A SILICON DIE HAVING AT LEAST ONE MAJOR FACE, AND HAVING A LAYER OF GERMANIUM ON SAID ONE MAJOR FACE; POSITIONING A GOLD-GERMANIUM ALLOY PREFORM ON A METALLIC BODY; DISPOSING SAID DIE AND SAID PREFORM WITH SAID GERMANIUM LAYER IN CONTACT WITH SAID PREFORM; AND, HEATING THE ASSEMBLAGE OF SAID DIE, SAID PREFORM, AND SAID METALLIC BODY TO A TEMPERATURE SUFFICIENT TO BOND SAID DIE TO SAID BODY.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-09-19 1970-03-21 1970-09-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-09-19 1974-03-21 1974-09-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-09-19 1978-03-21 1978-09-20 $7700.00 Window Closed / Lapsed

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