Transistor inverter ballasting circuit

Claim 1

AN INVERTER CIRCUIT COMPRISING A DIRECT CURRENT SOURCE, A TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR ELECTRODES, A TRANSFORMER HAVING INPUT AND OUTPUT WINDINGS AND A SATURABLE CORE, AN INPUT CIRCUIT COMPRISING THE EMITTER-COLLECTOR ELECTRODE PATH OF SAID TRANSISTOR AND SAID INPUT WINDING CONNECTED IN SERIES ACROSS SAID SOURCE, A LOAD CIRCUIT COMPRISING SAID OUTPUT WINDING, CURRENT LIMITING MEANS AND BILATERALLY CONDUCTING ELECTRIC DISCHARGE LAMP CONNECTED IN SERIES, A FEEDBACK CONNECTION FROM SAID OUTPUT WINDING TO THE BASE OF SAID TRANSISTOR ARRANGED TO TURN SAID TRANSISTOR ON DURING THE PHASE OF FLUX BUILDUP IN SAID CORE AND TO TURN SAID TRANSISTOR OFF AFTER SATURATION IN SAID CORE AND DURING THE PHASE OF FLUX COLLAPSE SUBSEQUENT THERETO, AND A FLYBACK CONTROL CIRCUIT COMPRISING A DIODE CONNECTING ONE SIDE OF SAID SOURCE TO A POINT IN SAID OUTPUT WINDING, THE POLARITY OF SAID DIODE BEING IN A DIRECTION TO BECOME FORWARD BIASED DURING THE PHASE OF FLUX COLLAPSE IN SAID CORE, THE LOCATION OF SAID POINT IN THE OUTPUT WINDING BEING SUCH THAT CONDUCTION TAKES PLACE THROUGH SAID DIODE ONLY WHEN ENERGY IS NOT BEING ABSORBED BY SAID LAMP WHEREBY TO FEED ENERGY BACK TO SAID SOURCE AND PREVENT THE GENERATION OF EXCESSIVELY HIGH VOLTAGES IN SAID OUTPUT CIRCUIT.