Subtraction unit for a digital computer

Claim 1

IN A DIGITAL COMPUTER ARITHMETIC UNIT ARRANGED FOR ELECTRICALLY SUBSTRACTING TWO FLOATING POINT NUMBERS, THE COMBINATION COMPRISING: (A) ALIGNMENT REGISTER MEANS HAVING MANTISSA AND EXPONENT STORAGE REGISTERS FOR STORING A MANTISSA AND AN EXPONENT FOR EACH OF TWO FLOATING POINT NUMBERS WHICH ARE TO BE COMBINED TOGETHER, THE MANTISSA SIGNALS OF EACH NUMBER BEING COMPOSED OF BINARYCODED-DIGIT SIGNALS, AND INCLUDING ELECTRICAL CIRCUITS FOR SELECTIVELY SHIFTING THE MANTISSAS OF THE TWO NUMBERS AND CORRESPONDINGLY ADJUSTING THE EXPONENTS UNTIL THE TWO MANTISSAS ARE ALIGNED WITH THE EXPONENTS EQUAL AND THE MOST SIGNIFICANT DIGIT OF THE MANTISSA OF THE NUMBER HAVING THE LARGER EXPONENT IS POSITIONED AT THE MOST SIGNIFICANT POSITION IN THE REGISTER IN WHICH IT IS STORED; (B) MEANS FOR FORMING THE RADIX COMPLEMENT OF THE FIRST NON-ZERO DIGIT AND THE RADIX MINUS ONE COMPLEMENT OF EACH SUBSEQUENT DIGIT OF ANY MANTISSA DIGITS OF THE SMALLER EXPONENT NUMBER SHIFTED PAST THE LEAST SIGNIFICANT DIGIT END OF THE CORRESPONDING REGISTER INCLUDING MEANS FOR SEPARATELY STORING THE LAST DIGIT SHIFTED PAST THE LEAST SIGNIFICANT DIGIT END AND COMPLEMENTED AS THE EXPONENTS OF THE NUMBERS ARE ADJUSTED TO EQUALITY; (C) MEANS FOR SELECTIVELY FORMING THE RADIX MINUS ONE COMPLEMENT OF EACH OF THE STORED MANTISSA DIGITS OF THE SMALLER EXPONENT NUMBER REMAINING IN THE CORRESPONDING MANTISSA REGISTER AFTER THE EXPONENTS ARE ADJUSTED TO EQUALITY; (D) MEANS FOR ELECTRICALLY COMBINING THE COMPLEMENTED AND UNCOMPLEMENTED DIGIT SIGNALS STORED IN THE MANTISSA REGISTERS AND FOR FORMING A RESULT MANTISSA COMPOSED OF BINARY-CODED-DIGIT SIGNALS CORRESPONDING TO THE DIFFERENT OF THE TWO ORIGINAL MANTISSAS INCLUDING MEANS FOR STORING THE RESULT DIGITS BACK INTO ONE OF THE SAME TWO MANTISSA REGISTERS AS THE ORIGINAL MANTISSAS ARE STORED; AND MEANS FOR SELECTIVELY SHIFTING THE RESULT DIGITS ONE DIGIT POSITION IN THE DIRECTION OF THE MOST SIGNIFICANT DIGIT THEREOF AND FOR CONCURRENTLY SHIFTING THE SEPARATELY STORED DIGIT BACK INTO THE SAME MANTISSA REGISTER AND FOR ELECTRICALLY ADJUSTING THE CORRESPONDING STORED EXPONENT SIGNAL CORRESPONDING TO SUCH SHIFT IF THERE IS A LEADING ZERO DIGIT IN THE RESULT FOR INCREASING THE ACCURACY OF THE RESULT.