Logic circuit

Claim 1

A LOGIC CIRCUIT COMPRISING THE COMBINATION OF A DIODE GATE CIRCUIT HAVING AN OUTPUT CONNECTION, A STROBE CIRCUIT, A CURRENT GATE CIRCUIT; AND A FLIP-FLOP CIRCUIT HAVING A PAIR OF INPUT CONNECTIONS AND A PAIR OF OUTPUT CONNECTIONS, SAID STROBE CIRCUIT COMPRISING AN ELECTRON DEVICE HAVING AN INPUT ELECTRODE AND AN OUTPUT ELECTRODE, MEANS FOR BIASING SAID ELECTRON DEVICE TO CUTOFF, AND MEANS FOR APPLYING A CLOCK PULSE TO SAID INPUT ELECTRODE, SAID CURRENT GATE CIRCUIT COMPRISING A PAIR OF ELECTRON DEVICES EACH HAVING INPUT ELECTRODES AND AN OUTPUT ELECTRODE, MEANS FOR CONNECTING A REFERENCE VOLTAGE TO ONE OF THE INPUT ELECTRODES OF ONE OF SAID PAIR OF ELECTRON DEVICES, MEANS FOR CONNECTING THE OUTPUT OF SAID DIODE GATE CIRCUIT TO AN INPUT ELECTRODE OF ANOTHER OF SAID PAIR OF ELECTRON DEVICES, MEANS FOR COUPLING THE OUTPUT ELECTRODE OF SAID STROBE CIRCUIT TO ANOTHER INPUT ELECTRODE OF BOTH OF SAID PAIR OF ELECTRON DEVICES, MEANS FOR TAKING OUTPUT VOLTAGES FROM SAID OUTPUT CONNECTIONS THROUGH INDIVIDUAL, PASSIVE CONSTANT DELAY CIRCUITS EACH HAVING A TIME DELAY SUBSTANTIALLY EQUAL TO THE TIME OF TRANSITION OF SAID FLIP-FLOP CIRCUIT FROM ONE STABLE STATE TO THE OTHER STABLE STATE, AND MEANS FOR COUPLING THE OUTPUT ELECTRODES OF SAID ELECTRON DEVICES INDIVIDUALLY TO THE INPUTS OF SAID FLIPFLOP CIRCUITS.