Sensing circuit

Claim 1

A SENSING CIRCUIT COMPRISING: FIRST AND SECOND TRANSISTORS EACH HAVING AN EMITTER, A BASE AND A COLLECTOR; SAID FIRST TRANSISTOR HAVING A HIGH IMPEDANCE IN A CERTAIN RANGE OF EMITTER TO BASE CURRENTS AND A LOW IMPEDANCE FOR CURRENTS OTHER THAN CURRENTS IN THIS RANGE; MEANS FOR ESTABLISHING A QUIESCENT CONDITION OF STABILITY IN SAID CIRCUIT IN WHICH SAID FIRST TRANSISTOR IS CONDUCTING AND SAID SECOND TRANSISTOR IS CUT OFF; A FIRST BRANCH CIRCUIT EMANATING FROM THE BASE OF SAID FIRST TRANSISTOR AND BEING CONNECTED THROUGH AN IMPEDANCE TO THE COLLECTOR OF SAID SECOND TRANSISTOR TO FORM A PATH FOR DIRECT CURRENT; ANOTHER BRANCH CIRCUIT EMANATING FROM THE BASE OF SAID SECOND TRANSISTOR AND BEING CONNECTED THROUGH AN IMPEDANCE TO THE COLLECTOR OF SAID FIRST TRANSISTOR TO FORM A PATH FOR DIRECT CURRENT; SECOND AND THIRD BRANCH CIRCUITS EMANATING FROM THE BASE OF SAID FIRST TRANSISTOR; MEANS FOR ESTABLISHING A PREDETERMINED CURRENT THROUGH SAID SECOND BRANCH IN A FIRST DIRECTION WITH RESPECT TO SAID BASE OF SAID FIRST TRANSISTOR, SAID LAST MENTIONED CURRENT BEING OF A VALUE OTHER THAN CURRENTS IN SAID RANGE; SIGNAL CURRENT MEANS SUFFICIENT TO ESTABLISH IN SAID THIRD BRANCH A CURRENT IN A DIRECTION WITH RESPECT TO SAID BASE OF SAID FIRST TRANSISTOR OPPOSITE TO SAID FIRST DIRECTION AND OF A MAGNITUDE JUST GREATER THAN THE DIFFERENCE BETWEEN THE SUM OF CURRENTS IN SAID FIRST AND SECOND BRANCHES AND A CURRENT IN SAID RANGE TO ESTABLISH A HIGH IMPEDANCE CONDITION IN SAID FIRST TRANSISTOR AND A SATURATED CONDITON IN SAID SECOND TRANSISTOR; AND UNIDIRECTIONAL IMPEDANCE MEANS RESPONSIVE TO SAID SECOND TRANSISTOR ASSUMING SAID SATURATED CONDITION TO DROP THE CURRENT IN SAID SECOND BRANCH TO SUBSTANTIALLY ZERO TO INSURE SAID FIRST TRANSISTOR IS MAINTAINED IN SAID HIGH IMPEDANCE CONDITION THROUGHOUT THE DURATION OF AN INPUT SIGNAL.