Direct coupled circuit utilizing fieldeffect transistors

Claim 1

AN ELECTRICAL CIRCUIT COMPRISING: A FIRST INSULATED-GATE FIELD-EFFECT TRANSISTOR HAVING GATE, SOURCE, AND DRAIN ELECTRODES AND EXHIBITING A DRAIN CURRENT VERSUS DRAIN VOLTAGE CHARACTERISTIC FOR ZERO GATE-TO-SOURCE BIAS VOLTAGE IN A LINEAR OPERATING REGION FOR SAID FIRST TRANSISTOR, A SECOND INSULATED-GATE FIELD-EFFECT TRANSISTOR HAVING GATE, SOURCE AND DRAIN ELECTRODES AND EXHIBITING A SECOND DRAIN CURRENT VERSUS DRAIN VOLTAGE CHARACTERISTIC HAVING A LINEAR OPERATING REGION FOR A GATE-TOSOURCE BIAS VOLTAGE CORRESPONDING TO A FIRST VOLTAGE, SAID FIRST VOLTAGE BIAS CHARACTERISTIC OF SAID SECOND TRANSISTOR SUBSTANTIALLY CORRESPONDING TO SAID ZERO GATE-TO-SOURCE BIAS VOLTAGE CHARACTERISTIC OF SAID FIRST TRANSISTOR, CIRCUIT MEANS INTERCONNECTING SAID FIRST AND SECOND INSULATED-GATE FIELD-EFFECT TRANSISTORS AS CASCADE DIRECT COUPLED AMPLIFIERS WITH THE DRAIN-TO-SOURCE CURRENT PATH OF SAID FIRST TRANSISTOR DIRECTLY COUPLED BETWEEN THE GATE AND SOURCE ELECTRODES OF SAID SECOND TRANSISTOR AND WITH A QUIESCENT VOLTAGE BETWEEN THE SOURCE AND DRAIN ELECTRODES OF SAID FIRST TRANSISTOR CORRESPONDING TO A GATE-TO-SOURCE BIAS VOLTAGE IN THE LINEAR OPERATING RANGE OF SAID SECOND TRANSISTOR.