Unijunction oscillator with plural outputs depending on input control

Claim 1

AN ELECTRONIC CLOCK CIRCUIT INCLUDING (A) UNIJUNCTION TRANSISTOR AND A CAPACITOR, (B) MEANS FOR CHARGING THE CAPACITOR, (C) MEANS FOR CONNECTION THE UNIJUNCTION TRANSISTOR AND THE CAPACITOR IN A RELAXATION OSCILLAWTOR CIRCUIT HAVING THEREIN A FIRST DISCHARGE LOOP FOR THE CAPACITOR THROUGH WHICH THE CAPACITOR PERIODICALLY DISCHARGES IN THE NORMAL OPERATION OF THE OSCILLATOR, THE PERIODICAL DISCHARGES APPEARING AT A FIRST PREDETERMINED FREQUENCY, (D) A SILICON CONTROLLED RECTIFIER HAVING A GATE ELECTRODE, MEANS FOR CONNECTING THE SILICON CONTROLLED RECTIFIER AND THE CAPACITOR IN A SECOND DISCHARGE LOOP FOR THE CAPACITOR, (E) MEANS FOR APPLYING INPUT PULSES AT A SECOND PREDETERMINED FREQUENCY TO THE GATE ELECTRODE TO RENDER THE SILICON CONTROLLED RECTIFIER CONDUCTIVE TO CAUSE THE CAPACITOR TO DISCHARGE IN THE SECOND LOOP IN SYNCHRONISM WITH THE INPUT PULSES RENDERING THE OSCILLATOR INOPERATIVE, (F) FIRST OUTPUT MEANS COMMON TO BOTH OF THE DISCHARGE LOOP OR DERIVING OUTPUT PULSES WHENEVER THE CAPACITOR DISCHARGES THROUGH EITHER OF THE DISCHARGE LOOPS, AND (G) SECOND OUTPUT MEANS FOR DERIVING OUTPUT PULSES FROM SAID FIRST DISCHARGE LOOP ONLY.