Delay-time controller employing output of compared delayed and undelayed reference signal as delay-line correction signal

Claim 1

A CONTROLLER FOR PRECISELY REGULATING THE TIME DELAY OF AN INPUT SIGNAL COMPRISING A SOURCE OF REFERENCE SIGNALS HAVING A FIXED PERIOD, MEANS INCLUDING A GATE CIRCUIT IN SERIES WITH PARALLEL CHANNELS FOR TRANSMITTING SAID REFERENCE SIGNALS FROM SAID SOURCE TO SAID CHANNELS, TIME DELAY MEANS INCLUDING A VARIABLE DELAY LINE IN ONE OF SAID PARALLEL CHANNELS FOR DELAYING SAID REFERENCE SIGNALS BY APPROXIMATELY ONE FIXED PERIOD, MEANS IN ANOTHER CHANNEL FOR TRANSMITTING SAID REFERENCE SIGNALS WITHOUT DELAY, A PROCESSOR FOR RECEIVING SIGNALS FROM SAID PARALLEL CHANNELS AND INCLUDING MEANS FOR COMPARING PHASE OF SAID SIGNALS AND GENERATING A CONTROL SIGNALS, PROPORTIONAL TO ANY DIFFERENCE IN PHASE BETWEEN SAID SIGNALS, MEANS FOR SUPPLYING SAID CONTROL SIGNAL TO SAID VARIABLE DELAY LINE TO ADJUST SAID TIME DELAY TO MORE CLOSELY EQUAL SAID FIXED PERIOD AND MEANS INCLUDING SAID GATE CIRCUIT RESPONSIVE TO AN INPUT SIGNAL TO STOP SAID REFERENCE SIGNALS AND TRANSMIT SAID INPUT SIGNAL TO SAID ONE CHANNEL AND THROUGH SAID ADJUSTED DELAY MEANS THEREIN.