Logarithmic gain tuned amplifier

Claim 1

A SIGNAL TRANSLATION SYSTEM COMPRISING FIRST AND SECOND TRANSISTOR MEANS CONNECTED IN A CASCODE CIRCUIT CONFIGURATION WITH THE EMITTER OF THE FIRST TRANSISTOR MEANS HELD AT A.C. GROUND AND SAID FIRST TRANSISTOR MEANS SERVING AS AN AGC CONTROL DEVICE FOR SAID SECOND TRANSISTOR MEANS SAID SECOND TRANSISTOR MEANS SERVING AS A PARAPHASE AMPLIFIER; SAID CASCODE CIRCUIT INCLUDING A FIRST RESISTOR CONNECTED TO THE COLLECTOR OF SAID FIRST TRANSISTOR MEANS, A SECOND RESISTOR CONNECTED BETWEEN THE EMITTER OF SAID FIRST TRANSISTOR MEANS AND THE COLLECTOR OF SAID SECOND TRANSISTOR MEANS AND A THIRD RESISTOR CONNECTED BETWEEN THE EMITTER OF SAID SECOND TRANSISTOR MEANS AND GROUND; RECTIFYING MEANS, A PN JUNCTION SEMI-CONDUCTOR DEVICE HAVING TWO REGIONS OF DIFFERENT CONDUCTIVITY, ONE OF SAID REGIONS BEING CONNECTED TO GROND, THE OTHER OF SAID REGIONS BEING CONNECTED IN A CIRCUIT BETWEEN THE EMITTER OF SAID SECOND TRANSISTOR MEANS AND THE BASE OF SAID FIRST TRANSISTOR MEANS AND INCLUDING A RECTIFIER, SAID PN JUNCTION DEVICE SERVING THE DUAL PURPOSE OF A BYPASS CAPACITOR FOR SAID RECTIFIER AND AS A NON-LINEAR RESISTANCE RESPONSIVE TO THE BACK BIAS VOLTAGE ON SAID PN JUNCTION, WHEREBY SAID FIRST TRANSISTOR MEANS CONTROLS CURRENT THROUGH THE CASCODE CIRCUIT TO CONTROL THE OUTPUT OF SAID SECOND TRANSISTOR AS SUBSTANTIALLY A LOGARITHMIC FUNCTION OF THE OUTPUT SIGNALS.