Convergence error reduction apparatus

Claim 1

IN AN ELECTRONIC REPETITIVE ANALOG COMPUTER HAVING AT LEAST ONE Y-TYPE AND AT LEAST ONE X-TYPE COMPUTING CIRCUIT, THE IMPROVEMENT WHICH COMPRISES IN ELECTRICAL COMBINATION: (A) FIRST CIRCUIT MEANS COMPRISING A HIGH GAIN AMPLIFIER WITH A CONDENSER IN PARALLEL RELATIONSHIP FOR RECEIVING AN ERROR SIGNAL (B) A PAIR OF DIODES AS SWITCHING MEANS FOR SAID FIRST CIRCUIT MEANS SO THAT SAID AMPLIFIER AND SAID CONDENSER CAN BE OPERATIVE ONLY WHEN THE OUTPUT OF SAID X-TYPE COMPUTING CIRCUIT IS A CERTAIN PREDETERMINED VALUE TO PROVIDE FOR COMPUTE TIME INTERVALS AND RESET TIME INTERVALS (C) SECOND CIRCUIT MEANS INCLUDING AT LEAST ONE OF SAID Y-TYPE COMPUTING CIRCUITS, SAID COMPUTING CIRCUITS COMPRISING AN INTEGRATOR AND POTENTIOMETER, THE OUTPUT OF SAID MEANS IS AN ERROR SIGNAL BEING THE DIFFERENCE BETWEEN A CALCULATED VALUE, AND A KNOWN VALUE AT SAID CERTAIN PREDETERMINED VALUE, SAID OUTPUT BEING CONVERTED WITH SAID FIRST CIRCUIT MEANS. (D) MEANS TO ADJUST SAID Y-TYPE CIRCUIT RESPONSIVE TO THE OUTPUT OF SAID CONDENSER. (E) MEANS OF INTRODUCING VALUES INTO SAID X-TYPE AND SAID Y-TYPE COMPUTING CIRCUITS.