Patent US3197657A successfully refreshed from Google Patents.
US3197657A
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Electrical logical circuit
Assignee: US Philips Corp
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Filing: 1962-12-12
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Granted: 1965-07-27
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Expires: 1982-12-12
Abstract
No abstract record available.
Inventors
- 👤 Clarke Raymond William
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:38
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/084; H03K19/20; H03K19/21; H03K19/212
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
189 words
A LOGICAL CIRCUIT COMPRISING A PLURALITY OF SIGNAL INPUT TERMINALS, A PAIR OF TRANSISTORS HAVING THEIR EMITTERS CONNECTED TO A COMMON CONSTANT-CURRENT SUPPLY TERMINAL, A SIGNAL OUTPUT TERMINAL CONNECTED TO A COLLECTOR OF THE TRANSISTOR PAIR, A PLURALITY OF PAIRS OF ASYMMETRICALLY CONDUCTIVE PATHS EQUAL IN NUMBER TO THE NUMBER OF SIGNAL INPUT TERMINALS, THE PATHS OF EACH OF SAID PAIRS BEING CONNECTED IN SERIES WITH EACH OTHER WITH THE SAME LOWIMPEDANCE DIRECTION OF CONDUCTION BETWEEN THE TWO BASE ELECTRODES OF THE TRANSISTOR PAIR WITH THEIR JUNCTION CONNECTED TO ONE OF THE SIGNAL TERMINALS, EACH BASE ELECTRODE OF THE TRANSISTOR PAIR BEING CONNECTED TO A FURTHER CONSTANT-CURRENT SUPPLY TERMINAL ONE OF WHICH TERMINALS IS PROVIDED FOR CONNECTION TO A SOURCE HAVING SUCH POLARITY AS TO PASS CURRENT INTO THE SYSTEM OF ASYMMETRICALLY CONDUCTIVE PATHS WHILE THE OTHER TERMINAL IS FOR CONNECTION TO A SOURCE HAVING SUCH POLARITY AS TO TAKE CURRENT FROM SAID SYSTEM OF PATHS AND A THIRD TRANSISTOR HAVING ITS EMITTER CONNECTED TO THE EMITTERS OF THE TRANSISTOR PAIR, ITS BASE CONNECTED TO A BIAS SUPPLY POINT AND ITS COLLECTOR CONNECTED TO AN ADDITIONAL LOGICAL OUTPUT TERMINAL.
Claim 2
Dependent Claim
189 words
A LOGICAL CIRCUIT COMPRISING A PLURALITY OF SIGNAL INPUT TERMINALS, A PAIR OF TRANSISTORS HAVING THEIR EMITTERS CONNECTED TO A COMMON CONSTANT-CURRENT SUPPLY TERMINAL, A SIGNAL OUTPUT TERMINAL CONNECTED TO A COLLECTOR OF THE TRANSISTOR PAIR, A PLURALITY OF PAIRS OF ASYMMETRICALLY CONDUCTIVE PATHS EQUAL IN NUMBER TO THE NUMBER OF SIGNAL INPUT TERMINALS, THE PATHS OF EACH OF SAID PAIRS BEING CONNECTED IN SERIES WITH EACH OTHER WITH THE SAME LOWIMPEDANCE DIRECTION OF CONDUCTION BETWEEN THE TWO BASE ELECTRODES OF THE TRANSISTOR PAIR WITH THEIR JUNCTION CONNECTED TO ONE OF THE SIGNAL TERMINALS, EACH BASE ELECTRODE OF THE TRANSISTOR PAIR BEING CONNECTED TO A FURTHER CONSTANT-CURRENT SUPPLY TERMINAL ONE OF WHICH TERMINALS IS PROVIDED FOR CONNECTION TO A SOURCE HAVING SUCH POLARITY AS TO PASS CURRENT INTO THE SYSTEM OF ASYMMETRICALLY CONDUCTIVE PATHS WHILE THE OTHER TERMINAL IS FOR CONNECTION TO A SOURCE HAVING SUCH POLARITY AS TO TAKE CURRENT FROM SAID SYSTEM OF PATHS AND A THIRD TRANSISTOR HAVING ITS EMITTER CONNECTED TO THE EMITTERS OF THE TRANSISTOR PAIR, ITS BASE CONNECTED TO A BIAS SUPPLY POINT AND ITS COLLECTOR CONNECTED TO AN ADDITIONAL LOGICAL OUTPUT TERMINAL.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-07-26 | 1969-01-25 | 1969-07-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-07-26 | 1973-01-25 | 1973-07-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-07-26 | 1977-01-25 | 1977-07-27 | $7700.00 | Window Closed / Lapsed |