Logical signal processing apparatus

Claim 1

A SUM TO ONE LIGICAL CONNECTIVE TRANSISTOR CIRCUIT COMPRISING IN COMBINATION: A TRANSISTOR HAVING A BASE OF ONE CONDUCTIVITY TYPE, A COLLECTOR OF AN OPPOSITE CONDUCTIVITY TYPE AND FIRST AND SECOND MINORITY CARRIER INJECTING EMITTER CONTACTS POSITIONED ON SAID BASE REGION WITHIN THE DIFFUSION DISTANCE OF THE AVERAGE MINORITY CARRIER DURING THE CARRIER LIFETIME OF THE SEMI-CONDUCTOR MATERIAL OF SAID COLLECTOR ACROSS SAID BASE REGION, MEANS CONNECTING SAID COLLECTOR TO A SOURCE OF POWER HAVING A FIRST POLARITY THROUGH A LOAD IMPEDANCE, MEANS CONNECTING SAID BASE TO A SOURCE OF POWER HAVING A POLARITY OPPOSITE TO SAID FIRST POLARITY THROUGH A BIASING IMPEDANCE, MEANS CONNECTING AT LEAST ONE INPUT VARIABLE TO SAID BASE REGION EACH SAID VARIABLE BEING CONNECTED THROUGH AN ISOLATING IMPEDANCE, MEANS CONNECTING SAID FIRST MINORITY CARRIER INJECTING CONTACT TO A REFERENCE POTENTIAL, MEANS CONNECTING SAID SECOND MINORITY CARRIER INJECTING CONTACT TO SAID OPPOSITE POLARITY SOURCE OF POWER THROUGH A BIASING IMPEDANCE, AND MEANS INTRODUCING AT LEAST ONE INPUT VARIABLE TO SAID SECOND MINORITY CARRIER INJECTING CONTACT EACH SAID VARIABLE BEING CONNECTED THROUGH A SEPARATE ISOLATING IMPEDANCE.