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US3193698A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor controlled speed shunt

Assignee: Fairbanks Morse Inc
•
Filing: 1960-05-27
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Granted: 1965-07-06
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Expires: 1980-05-27
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Abstract

No abstract record available.

Inventors

  • 👤 Robert M Henderson
  • 👤 Zechlin Richard

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 21:42
CPC Classifications
B; B60; B60L; B60L50/00; B60L50/10; B60L50/11; B60L2200/00; B60L2200/26; Y; Y02; Y02T; Y02T10/00; Y02T10/60; Y02T10/70; Y02T10/7072

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 273 words
A SWITCHING CIRCUIT COMPRISING FIRST TERMINAL MEANS FOR CONNECTING A SOURCE OF FIXED VOLTAGE THERETO, A FIRST TRANSISTOR HAVING COLLECTOR, EMITTER, AND BASE ELECTRODES, THE COLLECTOR AND EMITTER ELECTRODES OF SAID FIRST TRANSISTOR BEING CONNECTED IN SERIES WITH SAID FIRST TERMINAL MEANS, ELECTRICALLY PASSIVE BIASING MEANS CONNECTED BETWEEN SAID FIXED VOLTAGE AT SAID FIRST TERMINAL MEANS AND THE BASE ELECTRODE OF SAID FIRST TRANSISTOR, SAID BIASING MEANS AND SAID FIXED VOLTAGE OPERATING TO FURNISH A POTENTIAL TO BIAS SAID FIRST TRANSISTOR INTO AN INITIAL STATE OF CONDITION, A SECOND TRANSISTOR HAVING COLLECTOR, EMITTER, AND BASE ELECTRODES, FIRST ELECTRICALLY PASSIVE MEANS CONNECTING THE BASE ELECTRODE OF SAID SECOND TRANSISTOR TO THE COLLECTOR ELECTRODE OF SAID FIRST TRANSISTOR, WHEREBY THE EMITTER-COLLECTOR CURRENT THROUGH SAID SECOND TRANSISTOR IS CONTROLLED BY THE EMITTER-COLLECTOR CURRENT THROUGH SAID FIRST TRANSISTOR, MEANS CONNECTING THE EMITTER OF SAID SECOND TRANSISTOR TO A POSITIVE TERMINAL OF SAID FIRST VOLTAGE SOURCE, WHEREBY SAID SECOND TRANSISTOR IN INITIALLY BASED TO CUT-OFF, SECOND TERMINAL MEANS FOR CONNECTING A CURRENT CONTROLLED DEVICE IN SERIES BETWEEN THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR AND A NEGATIVE TERMINAL OF SAID FIXED VOLTAGE SOURCE, THIRD TERMINAL MEANS FOR CONNECTING A SOURCE OF VARIABLE VOLTAGE THERETO, AND SECOND ELECTRICALLY PASSIVE MEANS CONNECTED ACROSS A PORTION OF SAID FIRST BIASING MEANS FOR APPLYING SAID SOURCE OF VARIABLE VOLTAGE TO THE BASE OF SAID FIRST TRANSISTOR, WHEREBY SAID VARIABLE VOLTAGE IS APPLIED IN OPPOSITE TO THE INITIAL BIAS POTENTIAL ON SAID FIRST TRANSISTOR, AND THE CONDUCTION OF SAID FIRST TRANSISTOR IS VARIED AT A PREDETERMINED AMPLITUDE OF SAID VARIABLE VOLTAGE TO CAUSE AN OPPOSITE VARIATION IN THE CONDUCTION OF SAID SECOND TRANSISTOR.
Claim 2
Dependent Claim 273 words
A SWITCHING CIRCUIT COMPRISING FIRST TERMINAL MEANS FOR CONNECTING A SOURCE OF FIXED VOLTAGE THERETO, A FIRST TRANSISTOR HAVING COLLECTOR, EMITTER, AND BASE ELECTRODES, THE COLLECTOR AND EMITTER ELECTRODES OF SAID FIRST TRANSISTOR BEING CONNECTED IN SERIES WITH SAID FIRST TERMINAL MEANS, ELECTRICALLY PASSIVE BIASING MEANS CONNECTED BETWEEN SAID FIXED VOLTAGE AT SAID FIRST TERMINAL MEANS AND THE BASE ELECTRODE OF SAID FIRST TRANSISTOR, SAID BIASING MEANS AND SAID FIXED VOLTAGE OPERATING TO FURNISH A POTENTIAL TO BIAS SAID FIRST TRANSISTOR INTO AN INITIAL STATE OF CONDITION, A SECOND TRANSISTOR HAVING COLLECTOR, EMITTER, AND BASE ELECTRODES, FIRST ELECTRICALLY PASSIVE MEANS CONNECTING THE BASE ELECTRODE OF SAID SECOND TRANSISTOR TO THE COLLECTOR ELECTRODE OF SAID FIRST TRANSISTOR, WHEREBY THE EMITTER-COLLECTOR CURRENT THROUGH SAID SECOND TRANSISTOR IS CONTROLLED BY THE EMITTER-COLLECTOR CURRENT THROUGH SAID FIRST TRANSISTOR, MEANS CONNECTING THE EMITTER OF SAID SECOND TRANSISTOR TO A POSITIVE TERMINAL OF SAID FIRST VOLTAGE SOURCE, WHEREBY SAID SECOND TRANSISTOR IN INITIALLY BASED TO CUT-OFF, SECOND TERMINAL MEANS FOR CONNECTING A CURRENT CONTROLLED DEVICE IN SERIES BETWEEN THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR AND A NEGATIVE TERMINAL OF SAID FIXED VOLTAGE SOURCE, THIRD TERMINAL MEANS FOR CONNECTING A SOURCE OF VARIABLE VOLTAGE THERETO, AND SECOND ELECTRICALLY PASSIVE MEANS CONNECTED ACROSS A PORTION OF SAID FIRST BIASING MEANS FOR APPLYING SAID SOURCE OF VARIABLE VOLTAGE TO THE BASE OF SAID FIRST TRANSISTOR, WHEREBY SAID VARIABLE VOLTAGE IS APPLIED IN OPPOSITE TO THE INITIAL BIAS POTENTIAL ON SAID FIRST TRANSISTOR, AND THE CONDUCTION OF SAID FIRST TRANSISTOR IS VARIED AT A PREDETERMINED AMPLITUDE OF SAID VARIABLE VOLTAGE TO CAUSE AN OPPOSITE VARIATION IN THE CONDUCTION OF SAID SECOND TRANSISTOR.

References Cited (Backward Citations)

US2617970A Cited
US3011076A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1968-07-05 1969-01-04 1969-07-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1972-07-05 1973-01-04 1973-07-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1976-07-05 1977-01-04 1977-07-06 $7700.00 Window Closed / Lapsed

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