Data reduction systems

Claim 1

DATA REDUCTION APPARATUS FOR REDUCING DATA IN THE FORM OF ANALOG INPUT SIGNALS, COMPRISING, FIRST INTEGRATING MEANS INCLUDING A FIRST TAPPED DELAY LINE HAVING AN INPUT AND OUTPUT AND A PLURALITY OF INTERMEDIATE OUTPUTS, A FIRST SUMMING NETWORK AND AMPLIFIER CONNECTED TO SAID INPUT AND OUTPUT AND INTERMEDIATE OUTPUTS OF SAID DELAY LINE AND EFFECTIVE TO PROVIDE A FIRST INTEGRATED ANALOG OUTPUT SIGNAL APPROXIMATING THE AMPLITUDE-TIME INTEGRAL OF SAID INPUT SIGNALS SUPPLIED TO THE INPUT OF AID DELAY LINE IN A FIRST PREDETERMINED TIME INTERVAL, SECOND INTERGRATING MEANS INCLUDING A SECOND TAPPED DELAY LINE HAVING AN INPUT CONNECTED TO THE OUTPUT OF SAID FIRST SUMMING NETWORK AND HAVING AN OUTPUT AND A PLURALITY OF INTERMEDIATE OUTPUTS, A SECOND SUMMING NETWORK AND AMPLIFIER CONNECTED TO THE INPUT, OUTPUT AND THE INTERMEDIATE OUTPUTS OF SAID SECOND DELAY LINE AND EFFECTIVE TO PROVIDE A SECOND INTEGRATED ANLOG OUTPUT SIGNAL APPROXIMATING THE AMPLITUDE-TIME INTERGRAL OF SAID FIRST INTEGRATED ANALOG OUTPUT SIGNALS IN A SECOND PREDETERMINED TIME INTERVAL, A FIRST AND A SECOND CLIPPING CIRCUIT CONNECTED TO THE OUTPUT OF SAID SECOND