Patent US3171972A successfully refreshed from Google Patents.
US3171972A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Clocking of logic circuits
Assignee: Unisys Corp
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Filing: 1960-05-12
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Granted: 1965-03-02
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Expires: 1980-05-12
Abstract
No abstract record available.
Inventors
- 👤 John R Wilkinson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 05:17
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
55 words
IN AN ARRANGEMENT FOR INDICATING THE SENSE OF A BINARY INPUT SIGNAL AND INCLUDING A BISTABLE CIRCUIT WHOSE OUTPUT IS RETURNED TO AN INPUT OF SAID CIRCUIT IN ACCORDANCE WITH THE SENSE OF A BINARY CONTROL SIGNAL, THE IMPROVEMENT COMPRISING MEANS INCLUDING MEANS COUPLED TO SAID INPUT AND PERFORMING AN OR-NOT FUNCTION, COUPLED TO RECEIVE
Claim 2
Dependent Claim
55 words
IN AN ARRANGEMENT FOR INDICATING THE SENSE OF A BINARY INPUT SIGNAL AND INCLUDING A BISTABLE CIRCUIT WHOSE OUTPUT IS RETURNED TO AN INPUT OF SAID CIRCUIT IN ACCORDANCE WITH THE SENSE OF A BINARY CONTROL SIGNAL, THE IMPROVEMENT COMPRISING MEANS INCLUDING MEANS COUPLED TO SAID INPUT AND PERFORMING AN OR-NOT FUNCTION, COUPLED TO RECEIVE
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-03-01 | 1968-08-31 | 1969-03-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-03-01 | 1972-08-31 | 1973-03-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-03-01 | 1976-08-31 | 1977-03-02 | $7700.00 | Window Closed / Lapsed |