Patent US3168706A successfully refreshed from Google Patents.
US3168706A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-stage transistor amplifier with operating point stabilization
Assignee: Hasler AG
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Filing: 1960-10-03
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Granted: 1965-02-02
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Expires: 1980-10-03
Abstract
No abstract record available.
Inventors
- 👤 Brenig Theodor
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:12
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/302; H03F1/34
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
225 words
IN A TRANSISTOR AMPLIFIER ARRANGEMENT HAVING AN INPUT AND AN OUTPUT AND AT LEAST THREE STAGES EACH INCLUDING ONE TRANSISTOR, IN COMBINATION, MEANS FOR COUPLING THE INPUT WITH THE BASE OF THE TRANSISTOR OF THE FIRST STAGE; MEANS FOR COUPLING THE OUTPUT WITH THE COLLECTOR OF THE TRANSISTOR OF THE FINAL STAGE; A SOURCE OF DIRECT CURRENT SUPPLY HAVING A FIRST AND SECOND TERMINAL; MEANS FOR DIRECTLY COUPLING THE COLLECTOR OF THE TRANSISTOR OF EACH STAGE TO THE BASE OF THE TRANSISTOR OF THE NEXT FOLLOWING STAGE, RESPECTIVELY; MEANS FOR CONNECTING THE EMITTER OF THE TRANSISTOR OF SAID FIRST STAGE TO SAID FIRST TERMINAL OF SAID SOURCE; A RESISTIVE VOLTAGE DIVIDER NETWORK INCLUDING TWO RESISTORS CONNECTED IN SERIES BETWEEN THE EMITTER OF THE TRANSISTOR OF SAID SECOND STAGE AND SAID FIRST TERMINAL OF SAID SOURCE, THE JUNCTION POINT BETWEEN SAID TWO RESISTORS BEING CONNECTED WITH THE BASE OF SAID TRANSISTOR OF SAID FIRST STAGE; A PLURALITY OF RESISTANCE MEANS RESPECTIVELY COUPLING DIRECTLY THE COLLECTOR OF THE TRANSISTOR OF THE INDIVIDUAL STAGES TO THE EMITTER OF THE TRANSISTOR OF THE RESPECTIVELY SECOND FOLLOWING STAGE; A FIRST RESISTOR CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID SOURCE AND THE COLLECTOR OF SAID TRANSISTOR OF SAID SECOND TERMINAL OF OND RESISTOR CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID SOURCE AND THE BASE OF SAID TRANSISTOR OF SAID FINAL STAGE.
Claim 2
Dependent Claim
225 words
IN A TRANSISTOR AMPLIFIER ARRANGEMENT HAVING AN INPUT AND AN OUTPUT AND AT LEAST THREE STAGES EACH INCLUDING ONE TRANSISTOR, IN COMBINATION, MEANS FOR COUPLING THE INPUT WITH THE BASE OF THE TRANSISTOR OF THE FIRST STAGE; MEANS FOR COUPLING THE OUTPUT WITH THE COLLECTOR OF THE TRANSISTOR OF THE FINAL STAGE; A SOURCE OF DIRECT CURRENT SUPPLY HAVING A FIRST AND SECOND TERMINAL; MEANS FOR DIRECTLY COUPLING THE COLLECTOR OF THE TRANSISTOR OF EACH STAGE TO THE BASE OF THE TRANSISTOR OF THE NEXT FOLLOWING STAGE, RESPECTIVELY; MEANS FOR CONNECTING THE EMITTER OF THE TRANSISTOR OF SAID FIRST STAGE TO SAID FIRST TERMINAL OF SAID SOURCE; A RESISTIVE VOLTAGE DIVIDER NETWORK INCLUDING TWO RESISTORS CONNECTED IN SERIES BETWEEN THE EMITTER OF THE TRANSISTOR OF SAID SECOND STAGE AND SAID FIRST TERMINAL OF SAID SOURCE, THE JUNCTION POINT BETWEEN SAID TWO RESISTORS BEING CONNECTED WITH THE BASE OF SAID TRANSISTOR OF SAID FIRST STAGE; A PLURALITY OF RESISTANCE MEANS RESPECTIVELY COUPLING DIRECTLY THE COLLECTOR OF THE TRANSISTOR OF THE INDIVIDUAL STAGES TO THE EMITTER OF THE TRANSISTOR OF THE RESPECTIVELY SECOND FOLLOWING STAGE; A FIRST RESISTOR CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID SOURCE AND THE COLLECTOR OF SAID TRANSISTOR OF SAID SECOND TERMINAL OF OND RESISTOR CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID SOURCE AND THE BASE OF SAID TRANSISTOR OF SAID FINAL STAGE.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-02-02 | 1968-08-03 | 1969-02-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-02-02 | 1972-08-03 | 1973-02-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-02-02 | 1976-08-03 | 1977-02-02 | $7700.00 | Window Closed / Lapsed |