Digital shift register using output transformer overshoot pulse as sequencing trigger pulse

Claim 1

A DIGITAL SHIFT REGISTER COMPRISING FIRST AND SECOND CASCADED STAGES, EACH HAVING AN INPUT AND AN OUTPUT, EACH STAGE COMPRISING AN "OR" GATE HAVING AN OUTPUT AND AT LEAST TWO INPUTS, FIRST AND SECOND "AND" GATES, EACH HAVING AN OUTPUT AND AT LEAST TWO INPUTS, THE OUTPUT OF SAID FIRST "AND" GATE CONNECTED TO ONE OF SAID "OR" GATE INPUTS AND THE OUTPUT OF SAID SECOND "AND" GATE CONNECTED TO ANOTHER OF SAID "OR" GATE INPUTS, A CLOCK PULSE SOURCE CONNECTED TO ONE INPUT OF EACH OF SAID FIRST AND SECOND "AND" GATES, A REGENERATIVE AMPLIFIER CONNECTED TO THE OUTPUT OF SAID "OR" GATE, OUTPUT MEANS AT THE OUTPUT OF SAID FIRST STAGE CONNECTED TO SAID SECOND STAGE FOR PRODUCING AN OUTPUT SIGNAL AND AN OVERSHOOT PULSE, SAID OVERSHOOT PULSE BEING PRODUCED AT A TIME LATER THAN THE BEGINNING OF SAID OUTPUT SIGNAL, FEEDBACK CIRCUIT MEANS CONNECTED BETWEEN SAID OUTPUT MEANS AND SAID SECOND "AND" GATE, MEANS IN SAID SECOND STAGE RESPONSIVE TO SAID OVERSHOOT PULSE FOR OPERATING SAID SECOND STAGE AT A TIME DIFFERING FROM THE TIME OF OPERATION OF SAID FIRST STAGE BY A TIME DELAY WHICH IS EQUAL TO A CLOCK PULSE LENGTH, WHEREBY A SHIFT IS PROVIDED BY EACH STAGE.