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US3154740A Expired / Lapsed US ⏱️ 0.0 years remaining

Automatic gain control system utilizing a network containing a short time constant and a long time constant

Assignee: Motorola Solutions Inc
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Filing: 1960-09-06
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Granted: 1964-10-27
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Expires: 1980-09-06
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Abstract

No abstract record available.

Inventors

  • 👤 Orville M Eness

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 18:59
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3052; H03G3/3073; H03G3/3068

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 198 words
A SIGNAL TRANSLATING SYSTEM HAVING A GAIN LEVEL THEREIN DEPENDENT UPON THE LEVEL AND DURATION OF A TRANSLATED SIGNAL, INCLUDING IN COMBINATION, A GAIN ESTABLISHING CIRCUIT CONNECTED TO SAID SIGNAL TRANSLATING SYSTEM FOR ESTABLISHING THE GAIN THEREOF IN RESPONSE TO A DIRECT CURRENT CONTROL POTENTIAL, A DETECTOR CIRCUIT INCLUDING A SHORT TIME CONSTANT INTEGRATING NETWORK RAPIDLY RESPONSIVE TO A CHANGE IN LEVEL OF A TRANSLATED SIGNAL IN SAID SYSTEM, SAID DETECTOR CIRCUIT BEING CONNECTED TO SAID GAIN ESTABLISHING CIRCUIT TO PROVIDE A CONTROL POTENTIAL FOR ESTABLISHING THE GAIN LEVEL UPON INITIAL INCREASE IN THE SIGNAL LEVEL, A LONG TIME CONSTANT INTEGRATING NETWORK CONNECTED TO SAID DETECTOR CIRCUIT AND SAID GAIN ESTABLISHING CIRCUIT TO PROVIDE A CONTROL POTENTIAL FOR MAINTAINING THE GAIN LEVEL ESTABLISHED BY SAID DETECTOR CIRCUIT, A FIRST TRANSISTOR CONTROLLED BY SAID DETECTOR CIRCUIT, A RESISTOR-CAPACITOR TIMING NETWORK CONTROLLED BY SAID FIRST TRANSISTOR, A SECOND TRANSISTOR CONNECTED IN CIRCUIT WITH SAID LONG TIME CONSTANT INTEGRATING CIRCUIT AND CONTROLLED BY SAID RESISTOR-CAPACITOR TIMING NETWORK TO PROVIDE A CHARGE CHANGING PATH FOR SAID LONG TIME CONSTANT INTEGRATING NETWORK UPON THE ABSENCE OF A SIGNAL IN SAID DETECTOR CIRCUIT AND AFTER A PREDETERMINED TIME ESTABLISHED BY SAID RESISTOR-CAPACITOR TIMING NETWORK.
Claim 2
Dependent Claim 198 words
A SIGNAL TRANSLATING SYSTEM HAVING A GAIN LEVEL THEREIN DEPENDENT UPON THE LEVEL AND DURATION OF A TRANSLATED SIGNAL, INCLUDING IN COMBINATION, A GAIN ESTABLISHING CIRCUIT CONNECTED TO SAID SIGNAL TRANSLATING SYSTEM FOR ESTABLISHING THE GAIN THEREOF IN RESPONSE TO A DIRECT CURRENT CONTROL POTENTIAL, A DETECTOR CIRCUIT INCLUDING A SHORT TIME CONSTANT INTEGRATING NETWORK RAPIDLY RESPONSIVE TO A CHANGE IN LEVEL OF A TRANSLATED SIGNAL IN SAID SYSTEM, SAID DETECTOR CIRCUIT BEING CONNECTED TO SAID GAIN ESTABLISHING CIRCUIT TO PROVIDE A CONTROL POTENTIAL FOR ESTABLISHING THE GAIN LEVEL UPON INITIAL INCREASE IN THE SIGNAL LEVEL, A LONG TIME CONSTANT INTEGRATING NETWORK CONNECTED TO SAID DETECTOR CIRCUIT AND SAID GAIN ESTABLISHING CIRCUIT TO PROVIDE A CONTROL POTENTIAL FOR MAINTAINING THE GAIN LEVEL ESTABLISHED BY SAID DETECTOR CIRCUIT, A FIRST TRANSISTOR CONTROLLED BY SAID DETECTOR CIRCUIT, A RESISTOR-CAPACITOR TIMING NETWORK CONTROLLED BY SAID FIRST TRANSISTOR, A SECOND TRANSISTOR CONNECTED IN CIRCUIT WITH SAID LONG TIME CONSTANT INTEGRATING CIRCUIT AND CONTROLLED BY SAID RESISTOR-CAPACITOR TIMING NETWORK TO PROVIDE A CHARGE CHANGING PATH FOR SAID LONG TIME CONSTANT INTEGRATING NETWORK UPON THE ABSENCE OF A SIGNAL IN SAID DETECTOR CIRCUIT AND AFTER A PREDETERMINED TIME ESTABLISHED BY SAID RESISTOR-CAPACITOR TIMING NETWORK.

References Cited (Backward Citations)

CA447405A Cited
US2515196A Cited
GB807780A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-10-27 1968-04-27 1968-10-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-10-27 1972-04-27 1972-10-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-10-27 1976-04-27 1976-10-27 $7700.00 Window Closed / Lapsed

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