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US3150271A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor pump circuit with time constant multiplier

Assignee: General Dynamics Corp
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Filing: 1960-10-06
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Granted: 1964-09-22
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Expires: 1980-10-06
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Abstract

No abstract record available.

Inventors

  • 👤 Robert G Robertson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 15:37
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/02; H03K4/023

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 318 words
IN A CIRCUIT FOR DEVELOPING FROM A TRAIN OF INPUT PULSES A WAVEFORM WHICH CHANGES IN STEPS FROM AN INITIAL LEVEL TO A PEAK VALUE AND THEN REVERTS SUBSTANTIALLY LINEARLY TOWARDS SAID LEVEL, SAID CIRCUIT INCLUDING AN INPUT CIRCUIT HAVING A FIRST CONDENSER, A RECTIFIER AND A SECOND CONDENSER CONNECTED IN SERIES TO GROUND, AND A FIRST TRANSISTOR HAVING A PAIR OF ELECTRODES RESPECTIVELY CONNECTED TO OPPOSITE SIDES OF SAID RECTIFIER AND A THIRD ELECTRODE CONNECTED TO A SOURCE OF BIASING POTENTIAL, SAID INPUT CIRCUIT BEING RENDERED EFFECTIVE BY EACH INPUT PULSE TO CHARGE BOTH OF THE CONDENSERS, THE SECOND CONDENSER BEING LARGER THAN THE FIRST CONDENSER SO THAT ONLY A PORTION OF EACH INPUT PULSE IS DEVELOPED THEREACROSS, THE IMPROVEMENT WHICH COMPRISES FIRST AND SECOND RESISTORS CONNECTED IN SERIES BETWEEN A SOURCE OF REFERENCE POTENTIAL AND THE JUNCTION OF SAID FIRST CONDENSER AND SAID RECTIFIER TO PROVIDE A FIRST DISCHARGE PATH FOR SAID SECOND CONDENSER, AND A HIGH CURRENT GAIN EMITTER FOLLOWER CIRCUIT INCLUDING A SECOND TRANSISTOR HAVING A BASE ELECTRODE CONNECTED TO THE JUNCTION BETWEEN SAID RECTIFIER AND SAID SECOND CONDENSER, SAID SECOND TRANSISTOR ALSO HAVING A COLLECTOR ELECTRODE CONNECTED TO SAID SOURCE OF BIASING POTENTIAL AND AN EMITTER ELECTRODE CONNECTED THROUGH A THIRD RESISTOR TO THE JUNCTION BETWEEN SAID FIRST AND SECOND RESISTORS IN ORDER TO PASS DEGENERATIVE FEEDBACK CURRENT THROUGH SAID SECOND RESISTOR TO INCREASE THE TIME OF DISCHARGE OF SAID SECOND CONDENSER, THROUGH SAID FIRST DISCHARGE PATH, THEREBY TO PREVENT SUBSTANTIAL DISCHARGE OF SAID SECOND CONDENSER DURING THE PERIODS BETWEEN PULSES BUT TO PROVIDE FORE THE DISCHARGE OF SAID SECOND CONDENSER WHILE THE STEP WAVEFORM REVERTS FROM SID PEAK VALUE TOWARDS SAID INITIAL LEVEL, SAID THIRD RESISTOR HAVING A RESISTANCE MANY TIMES SMALLER THAN THAT OF EITHER OF SAID FIRST AND SECOND RESISTORS, AND THE OUTPUT FROM THE CIRCUIT BEING DERIVED FROM THE CURRENT FLOW FROM SAID EMITTER ELECTRODE THROUGH SAID THIRD RESISTOR.
Claim 2
Dependent Claim 318 words
IN A CIRCUIT FOR DEVELOPING FROM A TRAIN OF INPUT PULSES A WAVEFORM WHICH CHANGES IN STEPS FROM AN INITIAL LEVEL TO A PEAK VALUE AND THEN REVERTS SUBSTANTIALLY LINEARLY TOWARDS SAID LEVEL, SAID CIRCUIT INCLUDING AN INPUT CIRCUIT HAVING A FIRST CONDENSER, A RECTIFIER AND A SECOND CONDENSER CONNECTED IN SERIES TO GROUND, AND A FIRST TRANSISTOR HAVING A PAIR OF ELECTRODES RESPECTIVELY CONNECTED TO OPPOSITE SIDES OF SAID RECTIFIER AND A THIRD ELECTRODE CONNECTED TO A SOURCE OF BIASING POTENTIAL, SAID INPUT CIRCUIT BEING RENDERED EFFECTIVE BY EACH INPUT PULSE TO CHARGE BOTH OF THE CONDENSERS, THE SECOND CONDENSER BEING LARGER THAN THE FIRST CONDENSER SO THAT ONLY A PORTION OF EACH INPUT PULSE IS DEVELOPED THEREACROSS, THE IMPROVEMENT WHICH COMPRISES FIRST AND SECOND RESISTORS CONNECTED IN SERIES BETWEEN A SOURCE OF REFERENCE POTENTIAL AND THE JUNCTION OF SAID FIRST CONDENSER AND SAID RECTIFIER TO PROVIDE A FIRST DISCHARGE PATH FOR SAID SECOND CONDENSER, AND A HIGH CURRENT GAIN EMITTER FOLLOWER CIRCUIT INCLUDING A SECOND TRANSISTOR HAVING A BASE ELECTRODE CONNECTED TO THE JUNCTION BETWEEN SAID RECTIFIER AND SAID SECOND CONDENSER, SAID SECOND TRANSISTOR ALSO HAVING A COLLECTOR ELECTRODE CONNECTED TO SAID SOURCE OF BIASING POTENTIAL AND AN EMITTER ELECTRODE CONNECTED THROUGH A THIRD RESISTOR TO THE JUNCTION BETWEEN SAID FIRST AND SECOND RESISTORS IN ORDER TO PASS DEGENERATIVE FEEDBACK CURRENT THROUGH SAID SECOND RESISTOR TO INCREASE THE TIME OF DISCHARGE OF SAID SECOND CONDENSER, THROUGH SAID FIRST DISCHARGE PATH, THEREBY TO PREVENT SUBSTANTIAL DISCHARGE OF SAID SECOND CONDENSER DURING THE PERIODS BETWEEN PULSES BUT TO PROVIDE FORE THE DISCHARGE OF SAID SECOND CONDENSER WHILE THE STEP WAVEFORM REVERTS FROM SID PEAK VALUE TOWARDS SAID INITIAL LEVEL, SAID THIRD RESISTOR HAVING A RESISTANCE MANY TIMES SMALLER THAN THAT OF EITHER OF SAID FIRST AND SECOND RESISTORS, AND THE OUTPUT FROM THE CIRCUIT BEING DERIVED FROM THE CURRENT FLOW FROM SAID EMITTER ELECTRODE THROUGH SAID THIRD RESISTOR.

References Cited (Backward Citations)

US2873388A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-09-22 1968-03-23 1968-09-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-09-22 1972-03-23 1972-09-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-09-22 1976-03-23 1976-09-22 $7700.00 Window Closed / Lapsed

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