Patent US3148274A successfully refreshed from Google Patents.
US3148274A
Expired / Lapsed
US
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Binary adder
Assignee: International Business Machines Corp
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Filing: 1961-07-27
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Granted: 1964-09-08
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Expires: 1981-07-27
Abstract
No abstract record available.
Inventors
- 👤 Jr Edward M Davis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 15:01
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/50; G06F7/501; G06F7/5013; H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/10; G06F2207/00; G06F2207/38; G06F2207/48; G06F2207/4802; G06F2207/4828
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
180 words
A LOGIC CIRCUIT, COMPRISING A FIRST CURRENT PATH INCLUDING A TRANSISTOR AND A DEVICE WITH A NEGATIVE RESISTANCE ATTRIBUTE IN THE FORWARD CONDUCTING REGION, SAID TRANSISTOR AND DEVICE HAVING TOGETHER A GENERALLY N-SHAPED VOLT-AMPERE CHARACTERISTIC, A SECOND CURRENT PATH INCLUDING A TRANSISTOR PARALLELING SAID FIRST CURRENT PATH AND HAVING A VOLT-AMPERE CHARACTERISTIC WITH A HIGH CURRENT REGION LYING WITHIN THE VALLEY OF SAID N-SHAPED CHARACTERISTIC, INPUT MEANS FOR APPLYING TO SAID PATHS AN INPUT SIGNAL VARIABLE ACCORDING TO WHETHER 0, 1, 2 OR 3 WAYS OF A THREE WAY INPUT POSSESS A SIGNAL, FIRST MEANS COUPLED TO SAID FIRST PATH FOR DERIVING A FIRST OUTPUT SIGNAL FROM SAID CIRCUIT ONLY WHEN SAID FIRST PATH IS OPERATING IN A HIGH CURRENT REGION OF ITS CHARACTERISTIC IN RESPONSE TO A SIGNAL AT 1 OR 3 OF SAID WAYS, AND A SECOND MEANS COUPLED TO SAID SECOND PATH FOR DERIVING A SECOND OUTPUT SIGNAL FROM SAID CIRCUIT ONLY WHEN SAID SECOND PATH IS IN A HIGH CURRENT REGION OF ITS CHARACTERISTIC IN RESPONSE TO A SIGNAL AT 2 OR 3 OF SAID WAYS.
Claim 2
Dependent Claim
180 words
A LOGIC CIRCUIT, COMPRISING A FIRST CURRENT PATH INCLUDING A TRANSISTOR AND A DEVICE WITH A NEGATIVE RESISTANCE ATTRIBUTE IN THE FORWARD CONDUCTING REGION, SAID TRANSISTOR AND DEVICE HAVING TOGETHER A GENERALLY N-SHAPED VOLT-AMPERE CHARACTERISTIC, A SECOND CURRENT PATH INCLUDING A TRANSISTOR PARALLELING SAID FIRST CURRENT PATH AND HAVING A VOLT-AMPERE CHARACTERISTIC WITH A HIGH CURRENT REGION LYING WITHIN THE VALLEY OF SAID N-SHAPED CHARACTERISTIC, INPUT MEANS FOR APPLYING TO SAID PATHS AN INPUT SIGNAL VARIABLE ACCORDING TO WHETHER 0, 1, 2 OR 3 WAYS OF A THREE WAY INPUT POSSESS A SIGNAL, FIRST MEANS COUPLED TO SAID FIRST PATH FOR DERIVING A FIRST OUTPUT SIGNAL FROM SAID CIRCUIT ONLY WHEN SAID FIRST PATH IS OPERATING IN A HIGH CURRENT REGION OF ITS CHARACTERISTIC IN RESPONSE TO A SIGNAL AT 1 OR 3 OF SAID WAYS, AND A SECOND MEANS COUPLED TO SAID SECOND PATH FOR DERIVING A SECOND OUTPUT SIGNAL FROM SAID CIRCUIT ONLY WHEN SAID SECOND PATH IS IN A HIGH CURRENT REGION OF ITS CHARACTERISTIC IN RESPONSE TO A SIGNAL AT 2 OR 3 OF SAID WAYS.
References Cited (Backward Citations)
US3014663A
Cited
US2829999A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1967-09-08 | 1968-03-09 | 1968-09-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1971-09-08 | 1972-03-09 | 1972-09-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1975-09-08 | 1976-03-09 | 1976-09-08 | $7700.00 | Window Closed / Lapsed |