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US3143706A Expired / Lapsed US ⏱️ 0.0 years remaining

Radio receiver input protective selfactuated variable attenuator

Assignee: Collins Radio Co
•
Filing: 1962-05-31
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Granted: 1964-08-04
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Expires: 1982-05-31
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Abstract

No abstract record available.

Inventors

  • 👤 Harlan G Michael

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 09:50
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/52; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3052

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 265 words
A RADIO FREQUENCY SIGNAL VOLTAGE ATTENUATING SYSTEM FOR ATTENUATING RF INPUT VOLTAGES TO DESIRED RF SIGNAL VOLTAGE INPUT LEVELS TO THE FOLLOWING EQUIPMENT INCLUDING: A TRANSISTOR HAVING AN EMITTER, BASE AND COLLECTOR; RF SIGNAL INPUT MEANS CONNECTED TO THE COLLECTOR OF SAID TRANSISTOR FOR PROVIDING AN RF INPUT SIGNAL VOLTAGE PATH TO THE COLLECTOR OF SAID TRANSISTOR; OUTPUT MEANS CONNECTED TO THE EMITTER OF SAID TRANSISTOR FOR THE FEEDING OF RF SIGNAL VOLTAGES TO THE FOLLOWING EQUIPMENT; VOLTAGE CIRCUIT MEANS INCLUDING A D.C. SUPPLY, AND A VOLTAGE DIVIDER NETWORK BETWEEN THE D.C. SUPPLY AND A VOLTAGE REFERENCE, WITH RESISTIVE MEANS CONNECTED BETWEEN THE COLLECTOR AND THE BASE OF SAID TRANSISTOR, AND ADDITIONAL RESISTIVE MEANS CONNECTED BETWEEN THE BASE OF SAID TRANSISTOR AND SAID VOLTAGE REFERENCE FOR THE APPLYING OF BIAS BETWEEN THE COLLECTOR AND THE BASE OF SAID TRANSISTOR AND FOR PROVIDING VOLTAGE BIAS BETWEEN THE EMITTER AND THE BASE OF THE TRANSISTOR; A D.C. BLOCKING CAPACITOR PROVIDING A LOW A.C. IMPEDANCE PATH TO THE VOLTAGE REFERENCE FROM THE BASE OF SAID TRANSISTOR; SAID TRANSISTOR BEING SO CONNECTED AND SO BIASED IN THE CIRCUIT AS TO PROVIDE RECTIFICATION OF RF SIGNALS ABOVE PREDETERMINED INPUT LEVELS APPLIED AT THE COLLECTOR THROUGH THE COMMON JUNCTION OF THE COLLECTOR AND BASE OF THE TRANSISTOR TO THEREBY VARY THE D.C. VOLTAGE LEVEL AT THE BASE OF THE TRANSISTOR, CONSISTENT WITH THE RELATIVE STRENGTH OF THE RF SIGNAL ABOVE THE PREDETERMINED LEVEL, AND TO THEREBY VARY THE EMITTER BASE BIAS OF THE TRANSISTOR AND PROVIDE RESULTANT VARIABLE ATTENUATION OF RF SIGNAL TRANSMISSION FROM TRANSISTOR COLLECTOR INPUT TO TRANSISTOR EMITTER OUTPUT.
Claim 2
Dependent Claim 265 words
A RADIO FREQUENCY SIGNAL VOLTAGE ATTENUATING SYSTEM FOR ATTENUATING RF INPUT VOLTAGES TO DESIRED RF SIGNAL VOLTAGE INPUT LEVELS TO THE FOLLOWING EQUIPMENT INCLUDING: A TRANSISTOR HAVING AN EMITTER, BASE AND COLLECTOR; RF SIGNAL INPUT MEANS CONNECTED TO THE COLLECTOR OF SAID TRANSISTOR FOR PROVIDING AN RF INPUT SIGNAL VOLTAGE PATH TO THE COLLECTOR OF SAID TRANSISTOR; OUTPUT MEANS CONNECTED TO THE EMITTER OF SAID TRANSISTOR FOR THE FEEDING OF RF SIGNAL VOLTAGES TO THE FOLLOWING EQUIPMENT; VOLTAGE CIRCUIT MEANS INCLUDING A D.C. SUPPLY, AND A VOLTAGE DIVIDER NETWORK BETWEEN THE D.C. SUPPLY AND A VOLTAGE REFERENCE, WITH RESISTIVE MEANS CONNECTED BETWEEN THE COLLECTOR AND THE BASE OF SAID TRANSISTOR, AND ADDITIONAL RESISTIVE MEANS CONNECTED BETWEEN THE BASE OF SAID TRANSISTOR AND SAID VOLTAGE REFERENCE FOR THE APPLYING OF BIAS BETWEEN THE COLLECTOR AND THE BASE OF SAID TRANSISTOR AND FOR PROVIDING VOLTAGE BIAS BETWEEN THE EMITTER AND THE BASE OF THE TRANSISTOR; A D.C. BLOCKING CAPACITOR PROVIDING A LOW A.C. IMPEDANCE PATH TO THE VOLTAGE REFERENCE FROM THE BASE OF SAID TRANSISTOR; SAID TRANSISTOR BEING SO CONNECTED AND SO BIASED IN THE CIRCUIT AS TO PROVIDE RECTIFICATION OF RF SIGNALS ABOVE PREDETERMINED INPUT LEVELS APPLIED AT THE COLLECTOR THROUGH THE COMMON JUNCTION OF THE COLLECTOR AND BASE OF THE TRANSISTOR TO THEREBY VARY THE D.C. VOLTAGE LEVEL AT THE BASE OF THE TRANSISTOR, CONSISTENT WITH THE RELATIVE STRENGTH OF THE RF SIGNAL ABOVE THE PREDETERMINED LEVEL, AND TO THEREBY VARY THE EMITTER BASE BIAS OF THE TRANSISTOR AND PROVIDE RESULTANT VARIABLE ATTENUATION OF RF SIGNAL TRANSMISSION FROM TRANSISTOR COLLECTOR INPUT TO TRANSISTOR EMITTER OUTPUT.

References Cited (Backward Citations)

US2866892A Cited
US3061785A Cited
US3049623A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-08-04 1968-02-03 1968-08-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-08-04 1972-02-03 1972-08-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-08-04 1976-02-03 1976-08-04 $7700.00 Window Closed / Lapsed

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