Flip-flop circuit with an inductor between a logical input circuit and the flip-flop

Claim 1

A FLIP-FLOP CIRCUIT ARRANGEMENT COMPRISING: FLIP-FLOP CIRCUIT MEANS INCLUDING A FIRST TRANSISTOR AND A SECOND TRANSISTOR; LOGICAL INPUT CIRCUIT MEANS HAVING A SINGLE INPUT CIRCUIT AND FIRST AND SECOND OUTPUT CIRCUITS, SAID LOGICAL INPUT CIRCUIT MEANS BEING RESPONSIVE TO TRUE AND FALSE LOGICAL SIGNALS COUPLED TO SAID SINGLE INPUT CIRCUIT TO PRODUCE AN ELECTRICAL CURRENT IN SAID FIRST OR SECOND OUTPUT CIRCUIT, RESPECTIVELY; FIRST AND SECOND GATING CIRCUIT MEANS SEPARATELY COUPLING SAID FIRST AND SECOND OUTPUT CIRCUITS TO SAID FIRST AND SECOND TRANSISTORS, RESPECTIVELY, EACH OF SAID GATING CIRCUIT MEANS INCLUDING AN INDUCTIVE NETWORK INCLUDING AN INDUCTIVE ELEMENT; AND GATING PULSE INPUT CIRCUIT MEANS COUPLING SAID INDUCTIVE ELEMENTS TO A SOURCE OF GATING PULSES FOR CONTROLLING THE CURRENT PATH THROUGH EACH OF SAID INDUCTIVE ELEMENTS FROM THE RESPECTIVE OUTPUT CIRCUITS TO SAID SOURCE, WHEREBY ENERGY STORED IN EITHER ONE INDUCTIVE ELEMENT OR THE OTHER INDUCTIVE ELEMENT IS DISCHARGED INTO THE RESPECTIVE TRANSISTOR FOR TRIGGERING THE FLIP-FLOP CIRCUIT MEANS.