Diode and gate having integrator differentiator effecting logic function

Claim 1

A LOGIC AND CIRCUIT COMPRISING FIRST INPUT TERMINAL MEANS ADAPTED TO RECEIVE FIRST INPUT PULSES OF ONE POLARITY, SECOND INPUT TERMINAL MEANS FOR RECEIVING SECOND INPUT PULSES OF THE OPPOSITE POLARITY, SAID FIRST INPUT PULSES BEING OF RELATIVELY SHORT DURATION COMPARED WITH SAID SECOND INPUT PULSES, A UNILATERAL IMPEDANCE DEVICE COUPLED TO SAID FIRST AND SECOND INPUT TERMINAL MEANS AND POSITIONED BETWEEN SAID FIRST AND SECOND INPUT TERMINAL MEANS, SAID DEVICE BLOCKING PASSAGE THERETHROUGH OF SAID FIRST PULSES DURING THE ABSENCE OF SAID SECOND PULSES AND PRESENTING A LOW IMPEDANCE TO THE PASSAGE OF SAID FIRST PULSES WHENEVER SAID SECOND PULSES ARE AVAILABLE, INTEGRATING MEANS FOR INTEGRATING AVAILABE SECOND INPUT PULSES AND RECEPTIVE OF AVAILABLE FIRST INPUT PULSES FOR PROVIDING A COMPOSITE WAVEFORM MADE UP OF INTEGRATED SECOND INPUT PULSES UPON WHICH ARE SUPERIMPOSED SAID FIRST INPUT PULSES, AND DIFFERENTIATING MEANS OPERATING UPON SAID COMPOSITE WAVEFORM TO PROVIDE OUTPUT PULSES OF APPRECIABLE MAGNITUDE ONLY IN RESPONSE TO THE SUPERIMPOSED FIRST INPUT PULSES.