Pulse circuit

Claim 1

A PULSE CIRCUIT COMPRISING, A PAIR OF OUTPUT TERMINALS, A VOLTAGE SOURCE HAVING A FIRST AND A SECOND TERMINAL, MEANS CONNECTING THE FIRST TERMINAL OF SAID VOLTAGE SOURCE TO ONE OF SAID OUTPUT TERMINALS, A FIRST SILICON CONTROLLED RECTIFIER HAVING ANODE, CATHODE, AND GATE ELECTRODES AND HAVING ITS ANODE ELECTRODE CONNECTED TO THE SECOND TERMINAL OF SAID VOLTAGE SOURCE AND ITS CATHODE ELECTRODE CONNECTED TO THE OTHER OF SAID OUTPUT TERMINALS, A SOURCE OF GATING SIGNALS, A TRANSFORMER HAVING A PRIMARY WINDING AND A SECONDARY WINDING, MEANS CONNECTING SAID SOURCE OF GATING SIGNALS TO THE PRIMARY WINDING OF SAID TRANSFORMER, MEANS CONNECTING THE SECONDARY WINDING OF SAID TRANSFORMER BETWEEN THE CATHODE AND GATE ELECTRODES OF SAID FIRST SILICON CONTROLLED RECTIFIER, A FIRST RESISTANCE AND A FIRST CAPACITANCE CONNECTED IN SERIES BETWEEN THE ANODE AND CATHODE ELECTRODES OF SAID FIRST SILICON CONTROLLED RECTIFIER, SAID FIRST CAPACITANCE BEING CONNECTED TO SAID ANODE ELECTRODE, A SECOND SILICON CONTROLLED RECTIFIER HAVING ANODE, CATHODE, AND GATE ELECTRODES, MEANS CONNECTING THE CATHODE ELECTRODE OF SAID SECOND SILICON CONTROLLED RECTIFIER TO THE FIRST TERMINAL OF SAID VOLTAGE SOURCE, MEANS CONNECTING THE ANODE ELECTRODE OF SAID SECOND SILICON CONTROLLED RECTIFIER TO THE JUNCTION OF SAID FIRST RESISTANCE AND FIRST CAPACITANCE, A ZENER DIODE CONNECTED BETWEEN THE ANODE AND GATE ELECTRODES OF SAID SECOND SILICON CONTROLLED RECTIFIER AND POLED TO PERMIT ZENER CURRENT TO FLOW FROM SAID ANODE ELECTRODE TO SAID GATE ELECTRODE, A SECOND RESISTANCE AND A SECOND CAPACITANCE CONNECTED IN PARALLEL BETWEEN SAID OUTPUT TERMINALS TO FORM A DELAY CIRCUIT HAVING A TIME CONSTANT RC LARGER THAN SAID FIRST RESISTANCE AND FIRST CAPACITANCE CONNECTED IN SERIES.