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US3117240A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor inverter amplifier employing capacitor diode combination to provide synchronous output from synchronoulsy applied input

Assignee: International Business Machines Corp
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Filing: 1960-10-27
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Granted: 1964-01-07
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Expires: 1980-10-27
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Abstract

No abstract record available.

Inventors

  • 👤 Genung L Clapper

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 14:34
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/13; H03K5/135

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 173 words
A PULSE GENERATING CIRCUIT COMPRISING AN INVERTING AMPLIFIER TRANSISTOR HAVING EMITTER, BASE AND COLLECTOR ELECTRODES, A SOURCE OF EMITTER POTENTIAL, SAID TRANSISTOR BEING NORMALLY BIASED OFF, A SOURCE OF DISCRETE INPUT INFORMATION PULSES, AN INPUT DIODE CONNECTED BETWEEN SAID INPUT PULSE SOURCE AND THE BASE ELECTRODE OF SAID TRANSISTOR, A SOURCE OF SYNC PULSES, A CAPACITOR CONNECTED BETWEEN SAID SYNC PULSE SOURCE AND THE BASE ELECTRODE OF SAID TRANSISTOR, AND A DISCHARGE CIRCUIT FOR SAID CAPACITOR, SAID CAPACITOR BEING CHARGED THROUGH SAID INPUT DIODE UPON THE APPEARANCE OF AN INPUT PULSE COUPLED WITH THE TERMINATION OF A SYNC PULSE TO MAINTAIN SAID TRANSISTOR IN ITS OFF STATE WHEREBY NO OUTPUT IS PRODUCED DURING THE PRESENCE OF SAID INPUT PULSE, SAID CAPACITOR BEING DISCHARGED UPON TERMINATION OF SAID INPUT PULSE COUPLED WITH THE APPEARANCE OF ANOTHER SYNC PULSE, AND THEN CHARGED UPON TERMINATION OF SAID OTHER SYNC PULSE THROUGH THE BASE-EMITTER CIRCUIT OF SAID TRANSISTOR TO EFFECT TURN ON OF THE TRANSISTOR WHEREBY AN OUTPUT IS PRODUCED INDICATING THE ABSENCE OF AN INPUT PULSE.
Claim 2
Dependent Claim 173 words
A PULSE GENERATING CIRCUIT COMPRISING AN INVERTING AMPLIFIER TRANSISTOR HAVING EMITTER, BASE AND COLLECTOR ELECTRODES, A SOURCE OF EMITTER POTENTIAL, SAID TRANSISTOR BEING NORMALLY BIASED OFF, A SOURCE OF DISCRETE INPUT INFORMATION PULSES, AN INPUT DIODE CONNECTED BETWEEN SAID INPUT PULSE SOURCE AND THE BASE ELECTRODE OF SAID TRANSISTOR, A SOURCE OF SYNC PULSES, A CAPACITOR CONNECTED BETWEEN SAID SYNC PULSE SOURCE AND THE BASE ELECTRODE OF SAID TRANSISTOR, AND A DISCHARGE CIRCUIT FOR SAID CAPACITOR, SAID CAPACITOR BEING CHARGED THROUGH SAID INPUT DIODE UPON THE APPEARANCE OF AN INPUT PULSE COUPLED WITH THE TERMINATION OF A SYNC PULSE TO MAINTAIN SAID TRANSISTOR IN ITS OFF STATE WHEREBY NO OUTPUT IS PRODUCED DURING THE PRESENCE OF SAID INPUT PULSE, SAID CAPACITOR BEING DISCHARGED UPON TERMINATION OF SAID INPUT PULSE COUPLED WITH THE APPEARANCE OF ANOTHER SYNC PULSE, AND THEN CHARGED UPON TERMINATION OF SAID OTHER SYNC PULSE THROUGH THE BASE-EMITTER CIRCUIT OF SAID TRANSISTOR TO EFFECT TURN ON OF THE TRANSISTOR WHEREBY AN OUTPUT IS PRODUCED INDICATING THE ABSENCE OF AN INPUT PULSE.

References Cited (Backward Citations)

US3019350A Cited
US2455616A Cited
US2831971A Cited
US2891172A Cited
US2918587A Cited
US3049629A Cited
US3042811A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-01-06 1967-07-08 1968-01-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-01-06 1971-07-08 1972-01-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-01-06 1975-07-08 1976-01-07 $7700.00 Window Closed / Lapsed

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