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US3107308A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistorized magnetic amplifier and amplifier-complementer for digital computer circuits

Assignee: Individual
•
Filing: 1960-09-23
•
Granted: 1963-10-15
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Expires: 1980-09-23
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Abstract

No abstract record available.

Inventors

  • 👤 Ephraim W Hogue

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 17:57
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/02; G11C11/06; G11C11/06007; G11C11/06014

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 126 words
AN AMPLIFIER FOR DIGITAL SIGNALS COMPRISING: A SATURABLE CORE REACTOR HAVING A MAGNETIC CORE WITH A SUBSTANTIALLY RECTANGULAR HYSTERESIS LOOP AND A PAIR OF WINDINGS THEREON; A TRANSISTOR HAVING EMITTER, BASE AND COLLECTOR ELECTRODES; MEANS FOR APPLYING DIGITAL INPUT SIGNALS BETWEEN SAID BASE AND A POINT OF REFERENCE POTENTIAL; A DIODE HAVING ONE ELECTRODE CONNECTED TO SAID BASE; A SOURCE OF DIRECT CURRENT CONNECTED BETWEEN SAID COLLECTOR AND SAID REFERENCE POINT; A LOAD RESISTOR CONNECTED BETWEEN SAID EMITTER AND SAID REFERENCE POINT; MEANS CONNECTING ONE OF SAID WINDINGS BETWEEN SAID EMITTER AND SAID REFERENCE POINT; AN OUTPUT AND GATE COMPRISING TWO INPUT TERMINALS AND AN OUTPUT TERMINAL, A DIODE CONNECTED BETWEEN EACH INPUT TERMINAL AND SAID OUTPUT TERMINAL AND A RESISTOR CONNECTED BETWEEN SAID OUTPUT TERMINAL
Claim 2
Dependent Claim 126 words
AN AMPLIFIER FOR DIGITAL SIGNALS COMPRISING: A SATURABLE CORE REACTOR HAVING A MAGNETIC CORE WITH A SUBSTANTIALLY RECTANGULAR HYSTERESIS LOOP AND A PAIR OF WINDINGS THEREON; A TRANSISTOR HAVING EMITTER, BASE AND COLLECTOR ELECTRODES; MEANS FOR APPLYING DIGITAL INPUT SIGNALS BETWEEN SAID BASE AND A POINT OF REFERENCE POTENTIAL; A DIODE HAVING ONE ELECTRODE CONNECTED TO SAID BASE; A SOURCE OF DIRECT CURRENT CONNECTED BETWEEN SAID COLLECTOR AND SAID REFERENCE POINT; A LOAD RESISTOR CONNECTED BETWEEN SAID EMITTER AND SAID REFERENCE POINT; MEANS CONNECTING ONE OF SAID WINDINGS BETWEEN SAID EMITTER AND SAID REFERENCE POINT; AN OUTPUT AND GATE COMPRISING TWO INPUT TERMINALS AND AN OUTPUT TERMINAL, A DIODE CONNECTED BETWEEN EACH INPUT TERMINAL AND SAID OUTPUT TERMINAL AND A RESISTOR CONNECTED BETWEEN SAID OUTPUT TERMINAL

References Cited (Backward Citations)

US2953741A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1966-10-14 1967-04-15 1967-10-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1970-10-14 1971-04-15 1971-10-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1974-10-14 1975-04-15 1975-10-15 $7700.00 Window Closed / Lapsed

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