Combined transistor amplifier and switching circuit

Claim 1

IN A TRANSISTOR AMPLIFIER STAGE POWERED FROM A SOURCE OF DIRECT CURRENT POTENTIAL AND FOR TRANSMITTING SIGNAL VOLTAGES FROM AN INPUT CIRCUIT TO AN OUTPUT CIRCUIT, SAID SIGNAL VOLTAGES HAVING A PEAK MAGNITUDE NOT IN EXCESS OF A PREDETERMINED VALUE, SAID AMPLIFIER STAGE INCLUDING A TRANSISTOR HAVING A BASE ELECTRODE, A COLLECTOR ELECTRODE AND AN EMITTER ELECTRODE; SAID SIGNAL INPUT CIRCUIT BEING COUPLED TO THE SAID BASE ELECTRODE; MEANS COUPLED TO SAID EMITTER ELECTRODE FOR FORWARD BIASING SAID EMITTER ELECTRODE RELATIVE TO SAID BASE ELECTRODE OF SAID TRANSISTOR; IMPEDANCE MEANS COUPLED BETWEEN ONE SIDE OF SAID SOURCE OF DIRECT CURRENT POTENTIAL AND THE COLLECTOR ELECTRODE OF SAID TRANSISTOR AND ESTABLISHING THE DIRECT CURRENT OPERATING POTENTIAL LEVEL OF THE COLLECTOR ELECTRODE OF SAID TRANSISTOR AS CLOSE AS POSSIBLE TO THE OUTPUT VOLTAGE OF SAID SOURCE OF DIRECT CURRENT POTENTIAL WHILE ACHIEVING A PREDETERMINED STAGE GAIN TO THEREBY MINIMIZE THE VARIATION IN THE COLLECTOR POTENTIAL LEVEL UPON INTERRUPTION OF COLLECTOR CURRENT FLOW; SWITCHING PULSE INPUT TERMINALS ADAPTED FOR THE SELECTIVE APPLICATION THERETO OF A PREDETERMINED VOLTAGE PULSE OF SUBSTANTIALLY RECTANGULAR WAVE SHAPE; FILTER MEANS COUPLING ONE OF SAID SWITCHING PULSE INPUT TERMINALS TO THE EMITTER ELECTRODE OF SAID TRANSISTOR AND, THE OTHER OF SAID SWITCHING PULSE INPUT TERMINALS BEING COUPLED TO THE OTHER SIDE OF SAID SOURCE OF DIRECT CURRENT POTENTIAL FOR MODIFYING A SUBSTANTIALLY RECTANGULAR SWITCHING PULSE APPLIED TO SAID SWITCHING PULSE INPUT TERMINALS BY SLOWING DOWN AT LEAST ON OF THE RISE TIME AND THE DECAY TIME OF SAID SUBSTANTIALLY RECTANGULAR PULSE TO A PREDETERMINED TIME WITHIN THE RANGE OF FROM ONE OF FIXE CYCLES OF THE SIGNAL VOLTAGE AND APPLYING THE SO MODIFIED PULSE TO THE EMITER ELECTRODE OF SAID TRANSISTOR TO CUT OFF THE FLOW OF COLLECTOR CURRENT; AND VOLTAGE PEAK CLIPPING MEANS IN SAID OUTPUT CIRCUIT TO CLIP ANY OUTUT VOLTAGE SURGE HAVING A MAGNITUDE GREATER THAN THAT OF AN AMPLIFIED INPUT SIGNAL OF SAID PREDETERMINED PEAK VALUE; SAID OUTPUT CIRCUIT BEING COUPLED TO SAID COLLECTOR ELECTRODE OF SAID TRANSISTOR; SAID VOLTAGE PEAK CLIPPING MEANS BEING COUPLED BETWEEN SAID COLLECTOR ELECTRODE AND SAID EMITTER ELECTRODE OF SAID TRANSISTOR.