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US3100869A Expired / Lapsed US ⏱️ 0.0 years remaining

Pulse regenerator system with fault location facilities

Assignee: Unisys Corp
•
Filing: 1961-11-03
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Granted: 1963-08-13
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Expires: 1981-11-03
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Abstract

No abstract record available.

Inventors

  • 👤 Stanley B Disson
  • 👤 Albert J Meyerhoff
  • 👤 Iii Paul Winsor

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 08:30
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/30; H04; H04B; H04B17/00; H04B17/40

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 138 words
IN A CABLE SYSTEM FOR COMMUNICATION BY TRAINS OF "ON" AND "OFF" PULSES, (A) A WEST-TO-EAST REPEATER FOR RESHAPING INCOMING PULSES COMPRISING A PULSE QUANTIZER INCLUDING (B) A MAGNETIC CORE HAVING A SET AND A RESET STABLE CONDITION, (C) AN INPUT, LOAD, AND RESET WINDING COUPLED TO SAID CORE, (D) AN OUTPUT CIRCUIT COUPLED TO SAID QUANTIZER, (E) A TRANSISTOR HAVING AN EMITTER, COLLECTOR AND BASE ELECTRODE, (F) FIRST MEANS CONNECTING SAID LOAD WINDING IN THE EMITTER-COLLECTOR CIRCUIT OF SAID TRANSISTOR, (G) SECOND MEANS CONNECTING SAID INPUT WINDING IN THE BASE CIRCUIT OF SAID TRANSISTOR, (H) AN INPUT LINE AND AN OUTPUT LINE, (I) COUPLING MEANS FOR PROVIDING AN INPUT SIGNAL PATTERN OF "ON" AND "OFF" PULSES TO THE BASE ELECTRODE OF SAID TRANSISTOR CAUSING SAID TRANSISTOR TO SATURATE AND BY VIRTUE OF A REGENERATION BETWEEN SAID LOAD
Claim 2
Dependent Claim 138 words
IN A CABLE SYSTEM FOR COMMUNICATION BY TRAINS OF "ON" AND "OFF" PULSES, (A) A WEST-TO-EAST REPEATER FOR RESHAPING INCOMING PULSES COMPRISING A PULSE QUANTIZER INCLUDING (B) A MAGNETIC CORE HAVING A SET AND A RESET STABLE CONDITION, (C) AN INPUT, LOAD, AND RESET WINDING COUPLED TO SAID CORE, (D) AN OUTPUT CIRCUIT COUPLED TO SAID QUANTIZER, (E) A TRANSISTOR HAVING AN EMITTER, COLLECTOR AND BASE ELECTRODE, (F) FIRST MEANS CONNECTING SAID LOAD WINDING IN THE EMITTER-COLLECTOR CIRCUIT OF SAID TRANSISTOR, (G) SECOND MEANS CONNECTING SAID INPUT WINDING IN THE BASE CIRCUIT OF SAID TRANSISTOR, (H) AN INPUT LINE AND AN OUTPUT LINE, (I) COUPLING MEANS FOR PROVIDING AN INPUT SIGNAL PATTERN OF "ON" AND "OFF" PULSES TO THE BASE ELECTRODE OF SAID TRANSISTOR CAUSING SAID TRANSISTOR TO SATURATE AND BY VIRTUE OF A REGENERATION BETWEEN SAID LOAD

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1966-08-12 1967-02-11 1967-08-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1970-08-12 1971-02-11 1971-08-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1974-08-12 1975-02-11 1975-08-13 $7700.00 Window Closed / Lapsed

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