Methods of etching a semiconductor device

Claim 1

THE METHOD OF ETCHING A SEMICONDUCTOR DEVICE WHICH INCLUDES A BODY OF SEMICONDUCTOR MATERIAL HAVING A DIFFUSED LAYER AND A PN JUNCTION FORMED IN SAID LAYER BY ALLOYING WITH A METAL IMPURITY IN A LEAD CARRIER WHICH FLOW DURING SAID ALLOYING AND CREATE AN UNDESIRABLE LOW IMPEDANCE PATH ACROSS THE PERIPHERAL REGION OF SAID JUNCTION, COMPRISING: SUBJECTING SAID DEVICE TO THE INFLUENCE OF A SOLUTION COMPRISING 96 PARTS OF WATER, 32 PARTS GLACIAL ACETICACID AND 5 PARTS OF 30% HYDROGEN PEROXIDE WHILE APPLYING FOR A PERIOD OF SEVERAL SECONDS TO THE P-TYPE REGION OF SAID BODY A VOLTAGE WHICH IS POSITIVE WITH RESPECT TO SAID SOLUTION AND TO AN ELECTRODE IMMERSED THEREIN TO ESTABLISH A CURRENT FLOW OF SEVERAL MILLIAMPERES FOR REMOVING DELECTERIOUS MATERIAL INCLUDING SAID METAL IMPURITY AND SAID LEAD CARRIER CREATING SAID LOW IMPEDANCE PATH, THEREBY EXPOSING SAID JUNCTION; AND SUBJECTING SAID DEVICE TO AN ETCHING SOLUTION, WHICH HAS CHEMICAL INGREDIENTS DIFFERENT FROM AND CAPABLE OF ERODING SAID SEMICONDUCTOR ATERIAL AND SAID PERIPHERAL JUNCTION REGION AT A RATE FASTER THAN SAID FIRST-MENTIONED SOLUTOON, FOR AN INTERVAL OF TIME SUFFICIENT TO REMOVE SAID PERIPHERAL JUNCTION REGION AND THE SEMICONDUCTOR MATERIAL THAT IS CONTIGUOUS THEREWITH AND EXTENDS TO THE HIGHER RESISTANCE PORTION OF SAID DIFFUSED LAYER, THEREBY IMPROVING THE ELECTRICAL PROPERTIES OF SAID DEVICE.

Claim 2

THE METHOD OF ETCHING A SEMICONDUCTOR DEVICE WHICH INCLUDES A BODY OF SEMICONDUCTOR MATERIAL HAVING A DIFFUSED LAYER AND A PN JUNCTION FORMED IN SAID LAYER BY ALLOYING WITH A METAL IMPURITY IN A LEAD CARRIER WHICH FLOW DURING SAID ALLOYING AND CREATE AN UNDESIRABLE LOW IMPEDANCE PATH ACROSS THE PERIPHERAL REGION OF SAID JUNCTION, COMPRISING: SUBJECTING SAID DEVICE TO THE INFLUENCE OF A SOLUTION COMPRISING 96 PARTS OF WATER, 32 PARTS GLACIAL ACETICACID AND 5 PARTS OF 30% HYDROGEN PEROXIDE WHILE APPLYING FOR A PERIOD OF SEVERAL SECONDS TO THE P-TYPE REGION OF SAID BODY A VOLTAGE WHICH IS POSITIVE WITH RESPECT TO SAID SOLUTION AND TO AN ELECTRODE IMMERSED THEREIN TO ESTABLISH A CURRENT FLOW OF SEVERAL MILLIAMPERES FOR REMOVING DELECTERIOUS MATERIAL INCLUDING SAID METAL IMPURITY AND SAID LEAD CARRIER CREATING SAID LOW IMPEDANCE PATH, THEREBY EXPOSING SAID JUNCTION; AND SUBJECTING SAID DEVICE TO AN ETCHING SOLUTION, WHICH HAS CHEMICAL INGREDIENTS DIFFERENT FROM AND CAPABLE OF ERODING SAID SEMICONDUCTOR ATERIAL AND SAID PERIPHERAL JUNCTION REGION AT A RATE FASTER THAN SAID FIRST-MENTIONED SOLUTOON, FOR AN INTERVAL OF TIME SUFFICIENT TO REMOVE SAID PERIPHERAL JUNCTION REGION AND THE SEMICONDUCTOR MATERIAL THAT IS CONTIGUOUS THEREWITH AND EXTENDS TO THE HIGHER RESISTANCE PORTION OF SAID DIFFUSED LAYER, THEREBY IMPROVING THE ELECTRICAL PROPERTIES OF SAID DEVICE.