Transistorized reactor timer

Claim 1

TIMING APPARATUS COMPRISING A SIGNAL TRANSLATING STAGE COMPRISING, A FIRST SEMI-CONDUCTOR AMPLIFIER, A SECOND SEMI-CONDUCTOR AMPLIFIER, MEANS FOR SUPPLYING A UNIDIRECTIONAL POTENTIAL, CONNECTIONS BETWEEN SAID MEANS AND SAID FIRST SEMI-CONDUCTOR AMPLIFIER FOR BIASING SAID FIRST SEMI-CONDUCTOR AMPLIFIER INTO ONE STATE OF CONDUCTION, CONNECTIONS BETWEEN SAID MEANS AND SAID SECOND SEMICONDUCTOR AMPLIFIER FOR BIASING SAID SECOND SEMI-CONDUCTOR AMPLIFIER INTO ANOTHER STATE OF CONDUCTION, LOAD MEANS CONNECTED BETWEEN SAID MEANS AND ONE OF SAID SEMI-CONDUCTOR AMPLIFIERS TO BE CONTROLLED IN RESPONSE TO THE STATES OF CONDUCTION THEREOF, A SATURABLE REACTOR COMPRISING A COIL WOUND ON A CORE OF MAGNETIC MATERIAL HAVING A SQUARE LOOP MAGNETIZATION CURVE AND HAVING AN INPUT CIRCUIT AND AN OUTPUT CIRCUIT, CONNECTIONS INCLUDING SAID INPUT CIRCUIT AND SAID OUTPUT CIRCUIT BETWEEN SAID SATURABLE REACTOR AND SAID MEANS FOR BIASING SAID SATURABLE REACTOR INTO SATURATION IN ONE DIRECTION, MEANS FOR SUPPLYING A SIGNAL VOLTAGE OF A POLARITY AND A MAGNITUDE SUFFICIENT TO DRIVE SAID SATURABLE REACTOR INTO SATURATION IN THE OTHER DIRECTION, CONNECTIONS BETWEEN SAID OUTPUT CIRCUIT AND ONE OF SAID SEMI-CONDUCTOR AMPLIFIERS WHEREBY WHEN SAID SATURABLE REACTOR IS DRIVEN INTO SATURATION IN SAID OTHER DIRECTION SAID ONE OF SAID SEMI-CONDUCTOR AMPLIFIERS IS BIASED INTO ANOTHER STATE OF CONDUCTION, AND A CONNECTION BETWEEN SAID FIRST AND SECOND SEMI-CONDUCTOR AMPLIFIERS TO BIAS THE OTHER OF SAID SEMI-CONDUCTOR AMPLIFIERS INTO ANOTHER STATE OF CONDUCTION WHEN SAID ONE OF SAID SEMICONDUCTOR AMPLIFIERS IS BIASED INTO SAID ANOTHER STATE OF CONDUCTION.