Coded signal receiving and shaping circuit

Claim 1

A CARRIER-CURRENT CODED SIGNAL RECEIVING SYSTEM COMPRISING A PAIR OF INPUT TERMINALS AT WHICH A CARRIER-CURRENT SIGNAL VOLTAGE IS RECEIVED, A FIRST TRANSISTOR SO BIASSED AS TO HAVE BUT A VERY LOW GAIN IN ITS REST CONDITION, MEANS FOR APPLYING SAID SIGNAL VOLTAGE TO A CONTROL ELECTRODE OF SAID FIRST TRANSISTOR, MEANS FOR TRANSMITTING PART OF THE AMPLIFIED SIGNAL VOLTAGE FROM THE OUTPUT CIRCUIT OF SAID FIRST TRANSISTOR TO A FIRST RECTIFIER CIRCUIT, MEANS FOR APPLYING THE RECTIFIED VOLTAGE FROM SAID FIRST RECTIFIER CIRCUIT TO A CONTROL ELECTRODE OF A SECOND TRANSISTOR SO BIASSED IN ITS REST CONDITION AS TO HAVE A SUBSTANTIALLY ZERO COLLECTOR CURRENT, A LOAD RESISTANCE IN THE COLLECTOR CIRCUIT OF SAID SECOND TRANSISTOR, A FIRST FEEDBACK CIRCUIT FEEDING PART OF THE D.C. VOLTAGE ACROSS SAID RESISTANCE TO SAID CONTROL ELECTRODE OF SAID FIRST TRANSISTOR, A SECOND FEEDBACK CIRCUIT COMPRISING MEANS FOR TRANSMITTING A FURTHER PART OF SAID AMPLIFIED SIGNAL VOLTAGE TO A SECOND RECTIFIER CIRCUIT, A THIRD TRANSISTOR AMPLIFYING THE D.C. VOLTAGE DELIVERED BY SAID SECOND RECTIFIER CIRCUIT, A TIME-DIFFERENTIATING CIRCUIT DERIVING FROM SAID AMPLIFIED D.C. VOLTAGE A PULSE VOLTAGE, AND ASYMMETRICALLY CONDUCTING CONNECTION MEANS FOR APPLYING SAID PULSE VOLTAGE TO SAID CONTROL ELECTRODE OF SAID FIRST TRANSISTOR SO AS TO SUDDENLY DECREASE ITS GAIN WHEN SAID SIGNAL VOLTAGE DISAPPEARS; SAID SYSTEM FURTHER COMPRISING MEANS FOR APPLYING THE COLLECTOR CURRENT OF SAID SECOND TRANSISTOR TO A WORKING CIRCUIT.