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US20010029068A1
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Semiconductor device structure including a tantalum pentoxide layer sandwiched between silicon nitride layers
Assignee: Bell Semiconductor LLC
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Filing: 2001-06-11
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Granted: —
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Expires: 2021-06-11
Abstract
Abstract An insulating structure includes a first silicon nitride layer, a tantalum pentoxide layer formed above the first silicon nitride (SiN x ) layer, and a second silicon nitride layer formed above the tantalum pentoxide (Ta 2 O 5 ) layer. The SiN x cladding layers prevent diffusion of the tantalum during heating. A high dielectric constant is provided. The thermal stability of the insulating structure is improved. The insulating structure may be included in a capacitor or a shallow trench isolation structure. An exemplary capacitor is formed with a substrate, a lower electrode, the three-layer Si x N y /Ta 2 O 5 /Si x N y structure and an upper electrode. The lower electrode may include a TiN layer formed over an aluminum layer, or a TiN layer formed over a polysilicon layer, or a polysilicon layer having an oxide barrier layer formed on it. The upper electrode may be a TiN layer or a polysilicon layer. An exemplary shallow trench isolation structure includes the Si x N y /Ta 2 O 5 /Si x N y structure as a liner on the sides and bottom of a shallow trench in the surface of a substrate. The shallow trench is filled with an oxide, such as TEOS. A variety of methods may be used for fabricating devices that include the Si x N y /Ta 2 O 5 /Si x N y structure.
Inventors
- 👤 Sailesh Chittipeddi
- 👤 Charles Pearce
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:40
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/66; H10P14/662; H10D; H10D1/00; H10D1/60; H10D1/68; H10D84/00; H10D84/201; H10D84/204; H10D84/212; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69393; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6921; H10P14/69215; H10P14/6922; H10P14/694; H10P14/6943; H10P14/69433
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
36 words
1 . An insulating structure comprising: a first silicon nitride layer; a second silicon nitride layer separate from the first silicon nitride layer; and a tantalum pentoxide layer between the first and second silicon nitride layers.
Claim 2
Dependent Claim
36 words
1 . An insulating structure comprising: a first silicon nitride layer; a second silicon nitride layer separate from the first silicon nitride layer; and a tantalum pentoxide layer between the first and second silicon nitride layers.
Claim 3
Dependent Claim
26 words
2 . The insulating structure of claim 1 , wherein the insulating structure is sandwiched between a first electrode and a second electrode of a capacitor.
Claim 4
Dependent Claim
23 words
3 . The insulating structure of claim 1 , wherein the insulating structure is a liner structure of a shallow trench isolation region.
Claim 5
Dependent Claim
54 words
4 . A capacitor structure, comprising: a first electrode; a dielectric structure, including a first silicon nitride layer above the first electrode, a tantalum pentoxide layer above the first silicon nitride layer, and a second silicon nitride layer above the tantalum pentoxide layer; and a second electrode formed above the second silicon nitride layer.
Claim 6
Dependent Claim
54 words
4 . A capacitor structure, comprising: a first electrode; a dielectric structure, including a first silicon nitride layer above the first electrode, a tantalum pentoxide layer above the first silicon nitride layer, and a second silicon nitride layer above the tantalum pentoxide layer; and a second electrode formed above the second silicon nitride layer.
Claim 7
Dependent Claim
30 words
5 . The capacitor structure of claim 4 , wherein at least one of the group consisting of the first electrode and the second electrode is a metal containing layer.
Claim 8
Dependent Claim
30 words
6 . The capacitor structure of claim 4 , wherein one of the group consisting of the first electrode and the second electrode includes at least one titanium nitride layer.
Claim 9
Dependent Claim
39 words
7 . The capacitor structure of claim 4 , wherein at least one of the group consisting of the first electrode and the second electrode includes at least one layer of titanium nitride and at least one aluminum layer.
Claim 10
Dependent Claim
29 words
8 . The capacitor structure of claim 4 , wherein at least one of the group consisting of the first electrode and the second electrode is a polysilicon layer.
Claim 11
Dependent Claim
19 words
9 . The capacitor structure of claim 5 , wherein the first electrode is formed on a polysilicon substrate.
Claim 12
Dependent Claim
31 words
10 . The capacitor structure of claim 9 , wherein the first electrode is formed on a layer of silicon dioxide, and the silicon dioxide is formed on a silicon substrate.
Claim 13
Dependent Claim
24 words
11 . The capacitor structure of claim 5 , wherein the first and second silicon nitride layers are at least about 50 Angstroms thick.
Claim 14
Dependent Claim
21 words
12 . The capacitor structure of claim 5 , wherein the tantalum pentoxide layer is at least about 100 Angstroms thick.
Claim 15
Dependent Claim
90 words
13 . A shallow trench isolation structure, comprising: a substrate having a shallow trench on a surface thereof, the shallow trench having a bottom surface and a side surface, the shallow trench being located between two devices on the substrate; a first silicon nitride layer formed on the bottom and side surfaces of the shallow trench; a second silicon nitride layer above the first silicon nitride layer; a tantalum pentoxide layer between the first and second silicon nitride layers; and an oxide layer formed on the second silicon nitride layer.
Claim 16
Dependent Claim
90 words
13 . A shallow trench isolation structure, comprising: a substrate having a shallow trench on a surface thereof, the shallow trench having a bottom surface and a side surface, the shallow trench being located between two devices on the substrate; a first silicon nitride layer formed on the bottom and side surfaces of the shallow trench; a second silicon nitride layer above the first silicon nitride layer; a tantalum pentoxide layer between the first and second silicon nitride layers; and an oxide layer formed on the second silicon nitride layer.
Claim 17
Dependent Claim
17 words
14 . The shallow trench isolation structure of claim 11 , wherein the oxide layer contains tetraeythylorthosilicate.
Claim 18
Dependent Claim
26 words
15 . The shallow trench isolation structure of claim 13 , wherein the first and second silicon nitride layers are at least about 50 Angstroms thick.
Claim 19
Dependent Claim
23 words
16 . The shallow trench isolation structure of claim 13 , wherein the tantalum pentoxide layer is at least about 100 Angstroms thick.
Claim 20
Dependent Claim
50 words
17 . A method of forming a semiconductor device, comprising the steps of: forming a first silicon nitride layer overlying at least a portion of a substrate; forming a tantalum pentoxide layer above the first silicon nitride layer; and forming a second silicon nitride layer above the tantalum pentoxide layer.
Claim 21
Dependent Claim
50 words
17 . A method of forming a semiconductor device, comprising the steps of: forming a first silicon nitride layer overlying at least a portion of a substrate; forming a tantalum pentoxide layer above the first silicon nitride layer; and forming a second silicon nitride layer above the tantalum pentoxide layer.
Claim 22
Dependent Claim
23 words
18 . The method of claim 17 , wherein the first and second silicon nitride layers are at least about 50 Angstroms thick.
Claim 23
Dependent Claim
20 words
19 . The method of claim 17 , wherein the tantalum pentoxide layer is at least about 100 Angstroms thick.
Claim 24
Dependent Claim
53 words
20 . The method of claim 17 , further comprising the steps of forming a first electrode overlying at least a portion of the substrate, wherein the first silicon nitride layer is formed above the first electrode; and forming a second electrode above the second silicon nitride layer, thereby to form a capacitor.
Claim 25
Dependent Claim
28 words
21 . The method of claim 20 , wherein at least one of the first electrode and the second electrode forming steps includes forming a metal containing layer.
Claim 26
Dependent Claim
28 words
22 . The method of claim 20 , wherein at least one of the first electrode and the second electrode forming steps includes forming a titanium nitride layer.
Claim 27
Dependent Claim
34 words
23 . The method of claim 20 , wherein at least one of the first electrode and the second electrode forming steps includes forming a layer of titanium nitride and a layer of aluminum.
Claim 28
Dependent Claim
28 words
24 . The method of claim 20 , wherein at least one of the group consisting of the first electrode and the second electrode is a polysilicon layer.
Claim 29
Dependent Claim
18 words
25 . The method of claim 20 , wherein the first electrode is formed above a polysilicon substrate.
Claim 30
Dependent Claim
35 words
26 . The method of claim 20 , further comprising the step of forming a layer of silicon dioxide above a silicon substrate, wherein the first electrode is formed above the layer of silicon dioxide.
Claim 31
Dependent Claim
83 words
27 . The method of claim 17 , further comprising the steps of: providing a substrate having a shallow trench on a surface thereof, the shallow trench having a bottom surface and a side surface, the shallow trench being located between two active devices on the substrate, the first silicon nitride layer being formed over the bottom and side surfaces of the shallow trench; and forming an oxide layer above the second silicon nitride layer, thereby to form a shallow trench isolation structure.
Claim 32
Dependent Claim
14 words
28 . The method of claim 27 , wherein the oxide layer contains tetraeythylorthosilicate.
References Cited (Backward Citations)
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