Semiconductor storage device

Abstract

Abstract PURPOSE:To contrive accomplishment of high integration and high efficiency of the title memory storage without inflicting adverse effect on the characteristics of transistors by a method wherein the transistors point- symmetrically arranged around a contact hole are surrounded by the capacitors formed adjacently to the outside of the transistors. CONSTITUTION:The bit line 5, formed on an insulating layer 10, is connected to a source region 6a through the intermediary of a contact hole 2. Pertaining to the contact hole 2, the four transistors 6, which are point-symmetrically arranged, are isolated respectively by isolating groove 70. These isolating groove 70 may be filled up with an insulating material 70a. The capacitor of each memory cell are isolated respectively by the isolating regions 7 formed on the bottom part of capacitor grooves 40. In the above-mentioned semiconductor storage device on which four memory cells relating to a contact hole 2 are point-symmetrically arranged, capacitors can be arranged on both sides of the capacitor grooves 40. Accordingly, a highly integrated semiconductor storage device of high efficiency can be formed without deterioration in characteristics of the memory cells.

Inventors

• 👤 Masahiro Yoneda

Bibliographic Details