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JPS6489541A Expired / Lapsed JP ⏱️ 0.0 years remaining

Multilayer interconnection semiconductor device

Assignee: NEC Corp
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Filing: 1987-09-30
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Granted: —
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Expires: 2007-09-30
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Abstract

Abstract PURPOSE:To make it possible to properly accommodate a thin interconnection width with a filling metal, and to obtain electric conduction between an upper layer interconnection and a lower layer interconnection while maintaining flatness by arranging a via hole whose thickness is approximately that of the lower layer interconnection so that a part of the bottom thereof protrudes from the lower layer interconnection. CONSTITUTION:A via hole (and hence filling Al 7' which fills the via hole) is wider than a lower layer interconnection 2 in the width direction of the lower layer interconnection (first Al interconnection), both sides of the bottom thereof, therefore, protrude from the lower layer interconnection 2. Since the via hole width is larger than that of the first Al interconnection 2 which forms the lower layer interconnection, the width can be so dimensioned as to almost completely be filled with the filling Al, whereby a multilayer interconnection semiconductor device with excellent flatness and reliability can be obtained.

Inventors

  • 👤 Tsutomu Matsuura

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 12:15
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS60173857A Cited
JPS6148940A Cited
JPS62166546A Cited
JPS63172445A Cited

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