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JPS6482152A Expired / Lapsed JP ⏱️ 0.0 years remaining

Information processor

Assignee: NEC Corp
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Filing: 1987-09-24
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Granted: —
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Expires: 2007-09-24
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Abstract

Abstract PURPOSE:To shorten the executing time of a memory access caused by a real address produced from a microprogram by using a means which bypasses an address conversion stage. CONSTITUTION:A 1st selector 45 usually selects the real address outputted from an address conversion buffer 33 of an address conversion stage 30 via a connection 302 and then selects the logical address on a 1st bypass to send it to a register of a cache memory access stage 40 when an ATB bypass signal is received for indication of the bypass of the stage 30. A 2nd selector 44 usually selects the memory access request code passed through the stage 30 via a connection 301 and then selects the memory access request code set on a 1st bypass when the ATB bypass signal is received. In such a constitution, the stage 30 is bypassed and the information can be processed at high speed when a memory access request is produced by a real address requiring no conversion of addresses.

Inventors

  • 👤 Yoichi Sato

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 17:51
CPC Classifications
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