Semiconductor device

Abstract

Abstract PURPOSE:To make it possible to simply form a high impedance load by a method wherein an FET, having at least a semiconductor layer of a heterojunction bipolar transistor as a channel, is formed and it is used as a saturated resistor. CONSTITUTION:A heterojunction bipolar transistor is composed of an nGaAs layer 3 as a collector, a p<+> GaAs layer 4 as a base layer, an nAlGaAs layer 5 as an emitter, a base electrode 11, an emitter electrode 12 and a collector electrode 13. Also, a p-channel J-DFET is formed for the purpose of formation of a resistance load of said transistor. The J-DFET is composed of the above- mentioned nAlGaAs 5 and the nGaAs 3 as a gate region, and the n<+>GaAs layer 4 as an active layer. The heterojunction bipolar transistor, in which the saturated resistor is used as a load, is used as an inverter circuit, and a high gain can be obtained easily.

Inventors

• 👤 Yasuhiko Kuriyama
• 👤 Manabu Ishibe

Bibliographic Details