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Hetero-bipolar transistor

Assignee: NTT Inc
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Filing: 1987-09-18
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Granted: —
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Expires: 2007-09-18
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Abstract

Abstract PURPOSE:To realize a high speed silicon series hetero-bipolar transistor (Bi-HBT) by a method wherein a polycrystalline silicon containing a specified amount of arsenic is used as a wide gap emitter material. CONSTITUTION:A hetero-bipolar transistor is provided with a collector layer a composed of an n-type silicon region, a base layer 3 consisting of a p-type silicon region, and an emitter layer 6 formed of an n-type polycrystalline silicon region, where a wide gap material formed of polycrystalline silicon which contains 0.5% arsenic by mole is used as the emitter 6. If a polycrystalline silicon layer containing arsenic 5% or more by mole in concentration is used as an emitter section, current amplification factor hFE attains surely to about 70 or 30 when a base surface is kept 10<19>cm<-3> or even high 10<20>cm<-3> in concentration respectively, so that a high speed transistor can be constituted.

Inventors

  • 👤 Yoshihito Amamiya
  • 👤 Nobunori Konaka
  • 👤 Mamoru Ugajin

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 11:27
CPC Classifications
—

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