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JPS6459693A Expired / Lapsed JP ⏱️ 0.0 years remaining

Control circuit for eeprom

Assignee: Oki Electric Industry Co Ltd
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Filing: 1987-08-31
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Granted: —
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Expires: 2007-08-31
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Abstract

Abstract PURPOSE:To simplify the titled circuit and to attain a low voltage action by operating a control circuit with a low frequency clock pulse and using a boosting circuit with many FET boosting stages and a high-voltage shaping switching circuit. CONSTITUTION:A low frequency clock pulse oscillating circuit 11 is operated with a low voltage and a low current, and oscillates the pulse of around 30kHz. A boosting circuit 12 consists of a boosting stage FET with >=19 stages, is driven by the circuit 11, and obtains a direct current voltage of about 20V to an output voltage. A high-voltage shaping switching circuit 13 has the rise characteristics of an exponential type, and forms the direct current voltage of about 20V obtained at the circuit 12 into a high-voltage pulse necessary for the writing and erasing of a memory cell 16. By such a constitution, the high voltage necessary for the writing of an EEP-ROM cell 14 can be obtained from the low voltage, and further, a waveform shaping circuit is made unnecessary, and the circuit can be simplified.

Inventors

  • 👤 Koji Tanagawa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 09:15
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/14

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