Semiconductor device

Abstract

Abstract PURPOSE:To reduce sufficiently the current amplification factor of a parasitic transistor, by forming an N-type or P-type high concentration semiconductor region having diffusion depth deeper than the wells of an N-type and a P-type MOS transistors, in the boundary part between the forming region of the N-type MOS transistor and that of the P-type MOS transistor. CONSTITUTION:In a semiconductor device of Bi-CMOS structure in which a bipolar transistor and a CMOS transistor are formed at the same time, an N-type or P-type high concentration semiconductor region 6 having diffusion depth deeper than the wells 4, 5 of an N-type transistor and P-type transistors is formed, in the boundary part between the forming region of the N-type MOS transistor and that of the P-type MOS transistor. For example, after an N-type high concentration buried layer 2 and a P-type high concentration buries layer 3 are formed in a P-type silicon substrate 1, N-type epitaxial growth is performed, and the P-well or both of the P and N-wells are diffused to form the P-type substrate 4 of an N-type MOS transistor and the N-type substrate 5 of an P-MOS transistor. Then the N-type high concentration semiconductor region 6 is formed reaching the N-type high concentration buried layer 2.

Inventors

• 👤 Keiichiro Shimizu

Bibliographic Details