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JPS6453407A Expired / Lapsed JP ⏱️ 0.0 years remaining

Compound semiconductor substrate

Assignee: Sharp Corp
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Filing: 1987-07-06
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Granted: —
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Expires: 2007-07-06
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Abstract

Abstract PURPOSE:To obtain an InP substrate having an excellent flatness and crystallizability by alleviating both lattice dismatching and thermal stress, by a method wherein, when InP is formed on an Si substrate, GaAs is used for an intermediate layer. CONSTITUTION:Si is used for a group IV semiconductor substrate 1, GaAs is used for a III-V compound semiconductor layer 2, an intermediate layer, and InP is use for a III-V compound semiconductor layer 3 which aims at growth of large lattice mismatching with the group IV semiconductor substrate 1. In this case, the GaAs on the Si substrate is grown using the technique heretofore in use, and the GaAs layer receives thermal tensile stress caused by the relation of Si and the GaAs thermal expansion coefficient difference (Si<GaAs) between Si and GaAs. Besides, as the InP layer on the GaAs layer has the relation of the layer or small thermal expansion coefficient of GaAs>InP>Si, the InP layer receives thermal tensile stress from the Si substrate, but on the contrary, it receives compression stress from the GaAs layer. Accordingly, the thermal stress of the III-V compound semiconductor layer, which is grown by properly selecting the thickness and the condition of growth of the GaAs intermediate layer, can be alleviated.

Inventors

  • 👤 Akinori Seki
  • 👤 Fumihiro Atsunushi
  • 👤 Atsushi Kudo
  • 👤 Masayoshi Koba

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 00:58
CPC Classifications
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References Cited (Backward Citations)

JPS6126216A Cited
JPS63108707A Cited

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